1 ;====================================================================
2 ; File Name : 2440addr.a
3 ; Function : S3C2440 Define Address Register (Assembly)
4 ; Date : March 27, 2002
5 ; Revision : Programming start (February 18,2002) -> SOP
6 ; Revision : 03.11.2003 ver 0.0 Attatched
for 2440
7 ;====================================================================
10 BIG_ENDIAN__ SETL {
FALSE}
15 BWSCON EQU 0x48000000 ;Bus width & wait status
16 BANKCON0 EQU 0x48000004 ;Boot ROM control
17 BANKCON1 EQU 0x48000008 ;BANK1 control
18 BANKCON2 EQU 0x4800000c ;BANK2 control
19 BANKCON3 EQU 0x48000010 ;BANK3 control
20 BANKCON4 EQU 0x48000014 ;BANK4 control
21 BANKCON5 EQU 0x48000018 ;BANK5 control
22 BANKCON6 EQU 0x4800001c ;BANK6 control
23 BANKCON7 EQU 0x48000020 ;BANK7 control
24 REFRESH EQU 0x48000024 ;DRAM/SDRAM refresh
25 BANKSIZE EQU 0x48000028 ;Flexible Bank Size
26 MRSRB6 EQU 0x4800002c ;Mode
register set for SDRAM Bank6
27 MRSRB7 EQU 0x48000030 ;Mode
register set for SDRAM Bank7
30 ;==========================
31 ; CLOCK & POWER MANAGEMENT
32 ;==========================
33 LOCKTIME EQU 0x4c000000 ;PLL lock time counter
34 MPLLCON EQU 0x4c000004 ;MPLL Control
35 UPLLCON EQU 0x4c000008 ;UPLL Control
36 CLKCON EQU 0x4c00000c ;Clock generator control
37 CLKSLOW EQU 0x4c000010 ;Slow clock control
38 CLKDIVN EQU 0x4c000014 ;Clock divider control
44 SRCPND EQU 0x4a000000 ;Interrupt request status
45 INTMOD EQU 0x4a000004 ;Interrupt mode control
46 INTMSK EQU 0x4a000008 ;Interrupt mask control
47 PRIORITY EQU 0x4a00000c ;IRQ priority control <-- May 06, 2002 SOP
48 INTPND EQU 0x4a000010 ;Interrupt request status
49 INTOFFSET EQU 0x4a000014 ;Interruot request source offset
50 SUSSRCPND EQU 0x4a000018 ;Sub source pending
51 INTSUBMSK EQU 0x4a00001c ;Interrupt sub mask
57 GPFCON EQU 0x56000050 ;Port F control
58 GPFDAT EQU 0x56000054 ;Port F data
59 GPFUP EQU 0x56000058 ;Pull-up control F
61 ;Miscellaneous
register
62 MISCCR EQU 0x56000080 ;Miscellaneous control
63 DCKCON EQU 0x56000084 ;DCLK0/1 control
64 EXTINT0 EQU 0x56000088 ;External interrupt control
register 0
65 EXTINT1 EQU 0x5600008c ;External interrupt control
register 1
66 EXTINT2 EQU 0x56000090 ;External interrupt control
register 2
67 EINTFLT0 EQU 0x56000094 ;Reserved
68 EINTFLT1 EQU 0x56000098 ;Reserved
69 EINTFLT2 EQU 0x5600009c ;External interrupt filter control
register 2
70 EINTFLT3 EQU 0x560000a0 ;External interrupt filter control
register 3
71 EINTMASK EQU 0x560000a4 ;External interrupt mask
72 EINTPEND EQU 0x560000a8 ;External interrupt pending
73 GSTATUS0 EQU 0x560000ac ;External pin status
74 GSTATUS1 EQU 0x560000b0 ;Chip ID(0x32440000)
75 GSTATUS2 EQU 0x560000b4 ;Reset type
76 GSTATUS3 EQU 0x560000b8 ;Saved data0(32-bit) before entering POWER_OFF mode
77 GSTATUS4 EQU 0x560000bc ;Saved data1(32-bit) before entering POWER_OFF mode
79 ;Added for 2440 ; DonGo
80 MSLCON EQU 0x560000cc ;Memory sleep control register
85 WTCON EQU 0x53000000 ;Watch-dog timer mode
86 WTDAT EQU 0x53000004 ;Watch-dog timer data
87 WTCNT EQU 0x53000008 ;Eatch-dog timer count
92 NFCONF EQU 0x4E000000 ;NAND Flash configuration
93 NFCONT EQU 0x4E000004 ;NAND Flash control
94 NFCMD EQU 0x4E000008 ;NAND Flash command
95 NFADDR EQU 0x4E00000C ;NAND Flash address
96 NFDATA EQU 0x4E000010 ;NAND Flash data
97 NFDATA8 EQU 0x4E000010 ;NAND Flash data
98 NFMECCD0 EQU 0x4E000014 ;NAND Flash ECC for
Main Area
99 NFMECCD1 EQU 0x4E000018
100 NFSECCD EQU 0x4E00001C ;NAND Flash ECC for Spare Area
101 NFSTAT EQU 0x4E000020 ;NAND Flash operation status
102 NFESTAT0 EQU 0x4E000024
103 NFESTAT1 EQU 0x4E000028
104 NFMECC0 EQU 0x4E00002C
105 NFMECC1 EQU 0x4E000030
106 NFSECC EQU 0x4E000034
107 NFSBLK EQU 0x4E000038 ;NAND Flash Start block address
108 NFEBLK EQU 0x4E00003C ;NAND Flash End block address
1.8.1.1
