dma2.h

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#ifndef DMA2_H
#define DMA2_H

#define DMA2_IISSDO      0
#define DMA2_IISSDI      1
#define DMA2_SDI         2
#define DMA2_TIMER       3
#define DMA2_USB_EP3 4

#define DMA2_TRIGGER_HW 0
#define DMA2_TRIGGER_SW 1

// DISRCC, DIDSTC parameters
#define DMA2_SRC_LOC_APB        0x02
#define DMA2_SRC_LOC_AHB        0x00
#define DMA2_SRC_ADDR_FIXED     0x01
#define DMA2_SRC_ADDR_INC       0x00
#define DMA2_DST_LOC_APB        0x02
#define DMA2_DST_LOC_AHB        0x00
#define DMA2_DST_ADDR_FIXED     0x01
#define DMA2_DST_ADDR_INC       0x00    
// DCON paramaters
#define DMA2_HANDSHAKE_MODE     0x80000000      //[31]
#define DMA2_DEMAND_MODE        0x00000000
#define DMA2_SYNC_AHB           0x40000000      //[30]
#define DMA2_SYNC_APB           0x00000000
#define DMA2_DONE_GEN_INT       0x20000000      //[29]
#define DMA2_DONE_NO_INT        0x00000000
#define DMA2_TSZ_BURST          0x10000000      //[28]
#define DMA2_TSZ_UNIT           0x00000000
#define DMA2_WHOLE_SVC          0x08000000      //[27]
#define DMA2_SINGLE_SVC         0x00000000
#define DMA2_HW_TRIG            0x00800000      //[23]
#define DMA2_SW_TRIG            0x00000000
#define DMA2_RELOAD_OFF         0x00400000      //[22]
#define DMA2_RELOAD_ON          0x00000000
#define DMA2_DSZ_8b                     0x00000000
#define DMA2_DSZ_16b            0x00100000
#define DMA2_DSZ_32b            0x00200000      //[21:20]

typedef struct{                         // DMA registers                
    volatile U32 DISRC;     // 0x0   dma initial source reg.
    volatile U32 DISRCC;    // 0x4   dma initial source control reg.
    volatile U32 DIDST;     // 0x8   dma initial destination reg.
    volatile U32 DIDSTC;    // 0xc   dma initial destination control reg.
    volatile U32 DCON;      // 0x10  dma control reg.
    volatile U32 DSTAT;     // 0x14  dma status reg.
    volatile U32 DCSRC;     // 0x18  dma current source reg.
    volatile U32 DCDST;     // 0x1c  dma current destination reg.
    volatile U32 DMASKTRIG; // 0x20  dma mask trigger reg.
}DMA2_REGISTER;

typedef struct{
    INT8U  State;
    INT8U  Status;
    INT8U  InUse;
    INT8U  RequestSource;
    INT8U  TriggerMode;
    INT16U Id;
    INT16U UserId;
    INT32U SourceAddr;
    INT32U DestinationAddr;
    DMA2_REGISTER *pDma2Register;    
}DMA2_CONTROL;

extern DMA2_CONTROL Dma2Ctrl;
extern void F_Dma2Init(void);
extern void F_Dma2Svc(void);
extern INT8U F_Dma2InUseCheck(void);
extern INT8U F_Dma2Allocate(INT16U UserId);
extern INT8U F_Dma2Release(INT16U UserId);
extern INT8U F_Dma2Start(INT16U UserId);
extern INT8U F_Dma2Stop(INT16U UserId);
extern INT8U F_Dma2Run(INT16U UserId);
extern INT8U F_Dma2DisrcSet(INT16U UserId,INT32U InitialSource);
extern INT8U F_Dma2DidstSet(INT16U UserId,INT32U InitialDestination);
extern INT8U F_Dma2DisrccSet(INT16U UserId,INT32U InitialSourceCtrl);
extern INT8U F_Dma2DidstcSet(INT16U UserId,INT32U InitialDestinationCtrl);
extern INT8U F_Dma2DconSet(INT16U UserId,INT32U DmaControl);
extern INT8U F_Dma2LengthSet(INT16U UserId,INT32U Length);
extern INT8U F_Dma2TriggerModeSet(INT16U UserId,INT8U TriggerMode);
extern INT32U F_Dma2StatusRegisterGet(void);
extern INT8U F_Dma2IsrHookFunctionSet(INT16U UserId,INT32U Function);
extern INT8U F_Dma2DisrcSetIsr(INT16U UserId,INT32U InitialSource);
extern INT8U F_Dma2DidstSetIsr(INT16U UserId,INT32U InitialDestination);
extern INT8U F_Dma2LengthSetIsr(INT16U UserId,INT32U Length);
extern INT8U F_Dma2StartIsr(INT16U UserId);

#endif