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dma3.c
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1 /******************************************************
2 * Function: s3c2440 dma3 driver
3 *
4 * File: dma3.c
5 * Author: Book Chen
6 * Date: 2008.07.18
7 *******************************************************
8 */
9 
10 #include "includes.h"
11 
12 #define Dma3IdleState 0
13 
15 
16 void F_Dma3Init(void);
17 void F_Dma3Svc(void);
20 INT8U F_Dma3Release(INT16U UserId);
21 INT8U F_Dma3Reset(INT16U UserId);
22 INT8U F_Dma3Request(INT16U UserId);
23 INT8U F_Dma3Start(INT16U UserId);
24 INT8U F_Dma3Stop(INT16U UserId);
25 INT8U F_Dma3Run(INT16U UserId);
26 INT8U F_Dma3DisrcSet(INT16U UserId,INT32U InitialSource);
27 INT8U F_Dma3DidstSet(INT16U UserId,INT32U InitialDestination);
28 INT8U F_Dma3DisrccSet(INT16U UserId,INT32U InitialSourceCtrl);
29 INT8U F_Dma3DidstcSet(INT16U UserId,INT32U InitialDestinationCtrl);
30 INT8U F_Dma3DconSet(INT16U UserId,INT32U DmaControl);
31 INT8U F_Dma3LengthSet(INT16U UserId,INT32U Length);
32 INT8U F_Dma3TriggerModeSet(INT16U UserId,INT8U TriggerMode);
35 INT8U F_Dma3DisrcSetIsr(INT16U UserId,INT32U InitialSource);
36 INT8U F_Dma3DidstSetIsr(INT16U UserId,INT32U InitialDestination);
37 INT8U F_Dma3LengthSetIsr(INT16U UserId,INT32U Length);
39 
40 
41 void F_Dma3Init(void){
42  // initial hw sfr
43  Dma3Ctrl.pDma3Register=(DMA3_REGISTER *)(0x4b0000c0);
44  //Dma3Ctrl.pDma3Register->DISRC=(DMA3_REGISTER *)(0x4b0000c0);
45  //Dma3Ctrl.pDma3Register->DMASKTRIG=0x04; // stop dma
46  Dma3Ctrl.pDma3Register->DISRCC=0; // sourc in ahb, increment
47  Dma3Ctrl.pDma3Register->DIDSTC=0; // destination in ahb, increment
48  Dma3Ctrl.pDma3Register->DCON=0; // HWSRCSEL is I2SSDO
49  // variable initial
50  Dma3Ctrl.Id=ID_DMA3;
51  Dma3Ctrl.InUse=FALSE;
52  Dma3Ctrl.Status=0;
53  Dma3Ctrl.State=Dma3IdleState;
54 }
55 void F_Dma3Svc(void){}
57  if(Dma3Ctrl.State==Dma3IdleState) return TRUE;
58  else return FALSE;
59 }
61  if(Dma3Ctrl.InUse==TRUE) return TRUE; // resource is in use
62  else return FALSE; // resource is not in use
63 }
65  if(Dma3Ctrl.InUse==TRUE) return FALSE;
66  else{
67  Dma3Ctrl.InUse=TRUE;
68  Dma3Ctrl.UserId=UserId;
69  return TRUE; // resource is allocated
70  }
71 }
73  if(Dma3Ctrl.InUse==TRUE){
74  if(Dma3Ctrl.UserId==UserId){
75  Dma3Ctrl.pDma3Register->DMASKTRIG=0; // dma stop,channel off
76  Dma3Ctrl.InUse=FALSE;
77  return TRUE; // resource is relased
78  }
79  else return FALSE; // resource is not relased...invalid user id
80  }
81  else return TRUE; // resource is relased before
82 }
84  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
85  Dma3Ctrl.State=Dma3IdleState;
86  return TRUE;
87  }
88  else return FALSE;
89 }
90 /*INT8U F_Dma3RequestSourceSet(INT16U UserId,INT8U RequestSource){
91  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
92  if(RequestSource>4) return FALSE; // source= 0,1,2,3,4
93  Dma3Ctrl.RequestSource=RequestSource;
94  return TRUE;
95  }
96  else return FALSE;
97 }*/
98 INT8U F_Dma3DisrcSet(INT16U UserId,INT32U InitialSource){
99  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
100  Dma3Ctrl.pDma3Register->DISRC=InitialSource;
101  return TRUE;
102  }
103  else return FALSE;
104 }
105 INT8U F_Dma3DidstSet(INT16U UserId,INT32U InitialDestination){
106  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
107  Dma3Ctrl.pDma3Register->DIDST=InitialDestination;
108  return TRUE;
109  }
110  else return FALSE;
111 }
112 INT8U F_Dma3DisrccSet(INT16U UserId,INT32U InitialSourceCtrl){
113  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
114  Dma3Ctrl.pDma3Register->DISRCC=InitialSourceCtrl;
115  return TRUE;
116  }
117  else return FALSE;
118 }
119 INT8U F_Dma3DidstcSet(INT16U UserId,INT32U InitialDestinationCtrl){
120  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
121  Dma3Ctrl.pDma3Register->DIDSTC=InitialDestinationCtrl;
122  return TRUE;
123  }
124  else return FALSE;
125 }
126 INT8U F_Dma3DconSet(INT16U UserId,INT32U DmaControl){
127  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
128  Dma3Ctrl.pDma3Register->DCON=DmaControl;
129  return TRUE;
130  }
131  else return FALSE;
132 }
134  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
135  Dma3Ctrl.pDma3Register->DCON&=~0xfffff;
136  Dma3Ctrl.pDma3Register->DCON|=Length&0xfffff;
137  return TRUE;
138  }
139  else return FALSE;
140 }
142  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
143  if(TriggerMode==DMA3_TRIGGER_HW)
144  Dma3Ctrl.TriggerMode=DMA3_TRIGGER_HW; // hardware trigger
145  else if(TriggerMode==DMA3_TRIGGER_SW)
146  Dma3Ctrl.TriggerMode=DMA3_TRIGGER_SW; // software trigger
147  else
148  Dma3Ctrl.TriggerMode=DMA3_TRIGGER_SW; // software trigger
149  return TRUE;
150  }
151  else return FALSE;
152 }
154  return TRUE;
155 }
157  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
158  if(Dma3Ctrl.TriggerMode==DMA3_TRIGGER_HW)
159  Dma3Ctrl.pDma3Register->DMASKTRIG=2; // channel on
160  else
161  Dma3Ctrl.pDma3Register->DMASKTRIG=3; // channel on & software trigger
162  return TRUE;
163  }
164  else return FALSE;
165 }
167  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
168  Dma3Ctrl.pDma3Register->DMASKTRIG=1<<2; // stop the DMA operation
169  return TRUE;
170  }
171  else return FALSE;
172 }
174  return FALSE;
175 }
177  // DSTAT[21:20]==00 DMA ready for another transfer
178  // DSTAT[21:20]==01 DMA busy
179  // DSTAT[19: 0] transfer counter...CURR_TC-- to 0
180  return Dma3Ctrl.pDma3Register->DSTAT;
181 }
183  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
184  pISR_DMA3=Function;
185  return TRUE;
186  }
187  else return FALSE;
188 }
189 INT8U F_Dma3DisrcSetIsr(INT16U UserId,INT32U InitialSource){
190  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
191  Dma3Ctrl.pDma3Register->DISRCC=InitialSource;
192  return TRUE;
193  }
194  else return FALSE;
195 }
196 INT8U F_Dma3DidstSetIsr(INT16U UserId,INT32U InitialDestination){
197  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
198  Dma3Ctrl.pDma3Register->DIDST=InitialDestination;
199  return TRUE;
200  }
201  else return FALSE;
202 }
204  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
205  Dma3Ctrl.pDma3Register->DCON&=~0xfffff;
206  Dma3Ctrl.pDma3Register->DCON|=Length&0xfffff;
207  return TRUE;
208  }
209  else return FALSE;
210 }
212  if((Dma3Ctrl.InUse==TRUE)&&(Dma3Ctrl.UserId==UserId)){
213  if(Dma3Ctrl.TriggerMode==DMA3_TRIGGER_HW)
214  Dma3Ctrl.pDma3Register->DMASKTRIG=2; // channel on
215  else
216  Dma3Ctrl.pDma3Register->DMASKTRIG=3; // channel on & software trigger
217  return TRUE;
218  }
219  else return FALSE;
220 }