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lcdlib.h
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1 #ifndef __LCDLIB_H__
2 #define __LCDLIB_H__
3 
4 #define COLOR_RED_TFT16 0xf800
5 #define COLOR_GREEN_TFT16 0x07e0
6 #define COLOR_BLUE_TFT16 0x001f
7 
8 #define LCDFRAMEBUFFER 0x33800000
9 
10 #define S3C2410_LCDCON1_TFT (3<<5)
11 
12 #define S3C2410_LCDCON1_TFT16BPP (12<<1)
13 
14 #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8)
15 #define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
16 
17 #define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
18 #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14)
19 #define S3C2410_LCDCON2_VFPD(x) ((x) << 6)
20 #define S3C2410_LCDCON2_VSPW(x) ((x) << 0)
21 
22 #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
23 #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF)
24 #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F)
25 
26 #define S3C2410_LCDCON3_HBPD(x) ((x) << 19)
27 #define S3C2410_LCDCON3_WDLY(x) ((x) << 19)
28 #define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8)
29 #define S3C2410_LCDCON3_HFPD(x) ((x) << 0)
30 #define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
31 
32 #define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
33 #define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF)
34 
35 #define S3C2410_LCDCON4_MVAL(x) ((x) << 8)
36 #define S3C2410_LCDCON4_HSPW(x) ((x) << 0)
37 #define S3C2410_LCDCON4_WLH(x) ((x) << 0)
38 
39 
40 
41 
42 #define LCD5_BPP24BL (1 << 12)
43 #define LCD5_FRM565 (1 << 11)
44 #define LCD5_INVVCLK (1 << 10) /* STN/TFT :
45  1 : video data is fetched at VCLK falling edge
46  0 : video data is fetched at VCLK rising edge */
47 #define LCD5_INVVLINE (1 << 9) /* STN/TFT :
48  1 : VLINE/HSYNC pulse polarity is inverted */
49 #define LCD5_INVVFRAME (1 << 8) /* STN/TFT :
50  1 : VFRAME/VSYNC pulse polarity is inverted */
51 #define LCD5_INVVD (1 << 7) /* STN/TFT :
52  1 : VD (video data) pulse polarity is inverted */
53 #define LCD5_INVVDEN (1 << 6) /* TFT :
54  1 : VDEN signal polarity is inverted */
55 #define LCD5_INVPWREN (1 << 5)
56 #define LCD5_INVLEND (1 << 4) /* TFT :
57  1 : LEND signal polarity is inverted */
58 #define LCD5_PWREN (1 << 3)
59 #define LCD5_LEND (1 << 2) /* TFT,1 : Enable LEND signal */
60 #define LCD5_BSWP (1 << 1) /* STN/TFT,1 : Byte swap enable */
61 #define LCD5_HWSWP (1 << 0) /* STN/TFT,1 : HalfWord swap enable */
62 
63 #define M5D(n) ((n) & 0x1fffff) // To get lower 21bits
64 
65 
66 //TFT 240320
67 #define LCD_XSIZE_TFT_240320 (240)
68 #define LCD_YSIZE_TFT_240320 (320)
69 //TFT 320X240
70 #define LCD_XSIZE_TFT_320240 (320)
71 #define LCD_YSIZE_TFT_320240 (240)
72 //TFT 480X272
73 #define LCD_XSIZE_TFT_480272 (480)
74 #define LCD_YSIZE_TFT_480272 (272)
75 
76 //TFT 640480
77 #define LCD_XSIZE_TFT_640480 (640)
78 #define LCD_YSIZE_TFT_640480 (480)
79 //TFT 800600
80 #define LCD_XSIZE_TFT_800600 (800)
81 #define LCD_YSIZE_TFT_800600 (600)
82 
83 //TFT 240320
84 #define SCR_XSIZE_TFT_240320 (LCD_XSIZE_TFT_240320*2)
85 #define SCR_YSIZE_TFT_240320 (LCD_YSIZE_TFT_240320*2)
86 //TFT 320240
87 #define SCR_XSIZE_TFT_320240 (LCD_XSIZE_TFT_320240*2)
88 #define SCR_YSIZE_TFT_320240 (LCD_YSIZE_TFT_320240*2)
89 //TFT 480272
90 #define SCR_XSIZE_TFT_480272 (LCD_XSIZE_TFT_480272*2)
91 #define SCR_YSIZE_TFT_480272 (LCD_YSIZE_TFT_480272*2)
92 //TFT 640480
93 #define SCR_XSIZE_TFT_640480 (LCD_XSIZE_TFT_640480*2)
94 #define SCR_YSIZE_TFT_640480 (LCD_YSIZE_TFT_640480*2)
95 //TFT 800600
96 #define SCR_XSIZE_TFT_800600 (LCD_XSIZE_TFT_800600*2)
97 #define SCR_YSIZE_TFT_800600 (LCD_YSIZE_TFT_800600*2)
98 
99 
100 
101 #define LCD_240X320 1
102 
103 #define LCD_320X240 2
104 #define LCD_480x272 3
105 #define LCD_640480 3
106 
107 typedef struct {
108  unsigned int lcd_id;
109  unsigned long lcdcon1;
110  unsigned long lcdcon2;
111  unsigned long lcdcon3;
112  unsigned long lcdcon4;
113  unsigned long lcdcon5;
114  unsigned int xsize;
115  unsigned int ysize;
116  unsigned int scr_xsize;
117  unsigned int scr_ysize;
118 
119 }LCD_CONFIG;
120 
121  LCD_CONFIG tft_240x320 =
122 {
123  LCD_240X320,
124  S3C2410_LCDCON1_TFT16BPP | \
125  S3C2410_LCDCON1_TFT | \
126  S3C2410_LCDCON1_CLKVAL(10),
127 
128  S3C2410_LCDCON2_VBPD(2) | \
129  S3C2410_LCDCON2_LINEVAL(319)| \
130  S3C2410_LCDCON2_VFPD(2)| \
131  S3C2410_LCDCON2_VSPW(4),
132 
133  S3C2410_LCDCON3_HBPD(8) | \
134  S3C2410_LCDCON3_HOZVAL(239)| \
135  S3C2410_LCDCON3_HFPD(8),
136 
137  S3C2410_LCDCON4_MVAL(13) | \
138  S3C2410_LCDCON4_HSPW(6),
139 
140  LCD5_FRM565 | LCD5_HWSWP | LCD5_PWREN,
141  LCD_XSIZE_TFT_240320,
142  LCD_YSIZE_TFT_240320,
143  SCR_XSIZE_TFT_240320,
144  SCR_YSIZE_TFT_240320
145 
146 };
147 
148  LCD_CONFIG tft_320X240 =
149 {
150  LCD_320X240,
151 
152  S3C2410_LCDCON1_TFT16BPP | \
153  S3C2410_LCDCON1_TFT | \
154  S3C2410_LCDCON1_CLKVAL(5),
155 
156  S3C2410_LCDCON2_VBPD(14) | \
157  S3C2410_LCDCON2_LINEVAL(239)| \
158  S3C2410_LCDCON2_VFPD(5)| \
159  S3C2410_LCDCON2_VSPW(3),
160 
161  S3C2410_LCDCON3_HBPD(36) | \
162  S3C2410_LCDCON3_HOZVAL(319)| \
163  S3C2410_LCDCON3_HFPD(20),
164 
165  S3C2410_LCDCON4_MVAL(13) | \
166  S3C2410_LCDCON4_HSPW(30),
167 
168  LCD5_FRM565 |LCD5_INVVCLK|LCD5_INVVLINE|LCD5_INVVFRAME| \
169  LCD5_INVVDEN| LCD5_PWREN|LCD5_HWSWP,
170  LCD_XSIZE_TFT_320240,
171  LCD_YSIZE_TFT_320240,
172  SCR_XSIZE_TFT_320240,
173  SCR_YSIZE_TFT_320240
174 };
175 
176  LCD_CONFIG tft_480x272 =
177 {
178  LCD_480x272,
179 
180  S3C2410_LCDCON1_TFT16BPP | \
181  S3C2410_LCDCON1_TFT | \
182  S3C2410_LCDCON1_CLKVAL(5),
183 
184  S3C2410_LCDCON2_VBPD(2) | \
185  S3C2410_LCDCON2_LINEVAL(271)| \
186  S3C2410_LCDCON2_VFPD(2)| \
187  S3C2410_LCDCON2_VSPW(10),
188 
189  S3C2410_LCDCON3_HBPD(2) | \
190  S3C2410_LCDCON3_HOZVAL(479)| \
191  S3C2410_LCDCON3_HFPD(2),
192 
193  S3C2410_LCDCON4_MVAL(13) | \
194  S3C2410_LCDCON4_HSPW(41),
195 
196 
197  LCD5_FRM565 |LCD5_INVVCLK|LCD5_INVVLINE|LCD5_INVVFRAME| \
198  LCD5_INVVDEN| LCD5_PWREN|LCD5_HWSWP,
199  LCD_XSIZE_TFT_480272,
200  LCD_YSIZE_TFT_480272,
201  SCR_XSIZE_TFT_480272,
202  SCR_YSIZE_TFT_480272
203 
204 
205 };
206 
207 #endif
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