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testspi.c
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1 /******************************************************
2 * Function: Test s3c2440 spi function
3 *
4 * File: testspi.c
5 * Author: Book Chen
6 * Date: 2008.07.18
7 *******************************************************
8 */
9 #include "includes.h"
10 
11 #define TestSpiIdleState 0
12 #define TestSpiSpi0State0 1
13 #define TestSpiSpi0State1 2
14 #define TestSpiSpi1State0 3
15 #define TestSpiSpi1State1 4
16 
17 TESTSPI_CONTROL TestSpiCtrl;
18 #define TESTSPI_BUFFER_SIZE 100
19 INT8U TestSpiRxIndex=0;
20 INT8U TestSpiRxBuffer[TESTSPI_BUFFER_SIZE]={
21 0,0,0,0,0,0,0,0,0,0,
22 0,0,0,0,0,0,0,0,0,0,
23 0,0,0,0,0,0,0,0,0,0,
24 0,0,0,0,0,0,0,0,0,0,
25 0,0,0,0,0,0,0,0,0,0,
26 0,0,0,0,0,0,0,0,0,0,
27 0,0,0,0,0,0,0,0,0,0,
28 0,0,0,0,0,0,0,0,0,0,
29 0,0,0,0,0,0,0,0,0,0,
30 0,0,0,0,0,0,0,0,0,0
31 };
32 INT8U TestSpiTxIndex=0;
33 INT8U TestSpiTxBuffer[TESTSPI_BUFFER_SIZE]={
34  0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
35 10,11,12,13,14,15,16,17,18,19,
36 20,21,22,23,24,25,26,27,28,29,
37 30,31,32,33,34,35,36,37,38,39,
38 40,41,42,43,44,45,46,47,48,49,
39 50,51,52,53,54,55,56,57,58,59,
40 60,61,62,63,64,65,66,67,68,69,
41 70,71,72,73,74,75,76,77,78,79,
42 80,81,82,83,84,85,86,87,88,89,
43 90,91,92,93,94,95,96,97,98,99
44 };
45 
46 void F_TestSpiInit(void);
47 void F_TestSpiSvc(void);
48 INT8U F_TestSpiStart(INT8U SpiNumber);
49 void __irq TestSpiSpi0Isr(void);
50 void __irq TestSpiSpi1Isr(void);
51 
52 
53 void F_TestSpiInit(void){
54  TestSpiRxIndex=0;
55  TestSpiTxIndex=0;
56  TestSpiCtrl.Id=ID_TESTSPI;
57  TestSpiCtrl.InUse=FALSE;
58  TestSpiCtrl.Mode=TESTSPI_TRANSMIT;
59  TestSpiCtrl.State=TestSpiIdleState;
60 }
61 void F_TestSpiSvc(void){
62  INT8U i;
63 
64  switch(TestSpiCtrl.State){
65  case TestSpiIdleState:
66  break;
67  case TestSpiSpi0State0:
68  if(F_Spi0InUseCheck()==TRUE) return;
69  F_Spi0Allocate(TestSpiCtrl.Id);
70  TestSpiCtrl.Mode=TESTSPI_TRANSMIT;
71  TestSpiTxIndex=1;
72  printf("\n TestSpi start");
73  F_Spi0SppreSet(TestSpiCtrl.Id,0x00);
74  i=SPI0_INTRQ_MODE|SPI0_SCK_ENABLE|SPI0_MASTER|
75  SPI0_CLK_ACTIVE_H|SPI0_CLK_FMT_A|SPI0_TX_NORMAL;
76  F_Spi0SpconSet(TestSpiCtrl.Id,i);
77  i=SPI0_ENMUL_DISABLE|SPI0_RESERVE_SET|SPI0_KEEP_DISABLE;
78  F_Spi0SppinSet(TestSpiCtrl.Id,i);
79  F_Spi0IsrHookFunctionSet(TestSpiCtrl.Id,(INT32U)TestSpiSpi0Isr);
80  F_InterruptIrqEnable(BIT_SPI0);
81  F_Spi0SptdatSet(TestSpiCtrl.Id,TestSpiTxBuffer[0]); // spi tx start
82  TestSpiCtrl.State=TestSpiSpi0State1;
83  break;
84  case TestSpiSpi0State1:
85  if(TestSpiTxIndex<100) return;
86  printf("\n TestSpi stop");
87  F_InterruptIrqEnable(BIT_SPI0);
88  F_Spi0Release(TestSpiCtrl.Id);
89  TestSpiCtrl.State=TestSpiIdleState;
90  break;
91  case TestSpiSpi1State0:
92  if(F_Spi1InUseCheck()==TRUE) return;
93  TestSpiCtrl.Mode=TESTSPI_TRANSMIT;
94  TestSpiTxIndex=1;
95  F_Spi1Allocate(TestSpiCtrl.Id);
96  F_Spi1SppreSet(TestSpiCtrl.Id,0x00);
97  i=SPI1_INTRQ_MODE|SPI1_SCK_ENABLE|SPI1_MASTER|
98  SPI1_CLK_ACTIVE_H|SPI1_CLK_FMT_A|SPI1_TX_NORMAL;
99  F_Spi1SpconSet(TestSpiCtrl.Id,i);
100  i=SPI1_ENMUL_DISABLE|SPI1_RESERVE_SET|SPI1_KEEP_DISABLE;
101  F_Spi1SppinSet(TestSpiCtrl.Id,i);
102  F_Spi1IsrHookFunctionSet(TestSpiCtrl.Id,(INT32U)TestSpiSpi1Isr);
103  F_InterruptIrqEnable(BIT_SPI1);
104  F_Spi1SptdatSet(TestSpiCtrl.Id,TestSpiTxBuffer[0]); // spi tx start
105  TestSpiCtrl.State=TestSpiSpi1State1;
106  break;
107  case TestSpiSpi1State1:
108  if(TestSpiTxIndex<100) return;
109  F_InterruptIrqDisable(BIT_SPI1);
110  F_Spi1Release(TestSpiCtrl.Id);
111  TestSpiCtrl.State=TestSpiIdleState;
112  break;
113  }
114 }
115 INT8U F_TestSpiStart(INT8U SpiNumber){
116  if(SpiNumber==0){
117  TestSpiCtrl.State=TestSpiSpi0State0;
118  return TRUE;
119  }
120  else if(SpiNumber==1){
121  TestSpiCtrl.State=TestSpiSpi1State0;
122  return TRUE;
123  }
124  else return FALSE;
125 }
126 void __irq TestSpiSpi0Isr(void){
127  INT8U Status;
128 
129  ClearPending(BIT_SPI0);
130  F_Spi0SpstaGet(TestSpiCtrl.Id,&Status);
131  if(Status&SPI0_DCOL_DETECT){
132  //printf("\nSPI0 collision error");
133  }
134  else if(Status&SPI0_MULF_DETECT){
135  //printf("\nSPI0 multi master error");
136  }
137  if(Status&SPI0_READY_DETECT){
138  if(TestSpiCtrl.Mode==TESTSPI_RECEIVE){
139  if(TestSpiRxIndex<TESTSPI_BUFFER_SIZE){
140  F_Spi0SprdatGet(TestSpiCtrl.Id,&TestSpiRxBuffer[TestSpiRxIndex]);
141  TestSpiRxIndex++;
142  }
143  }
144  else if(TestSpiCtrl.Mode==TESTSPI_TRANSMIT){
145  if(TestSpiTxIndex<TESTSPI_BUFFER_SIZE){
146  F_Spi0SptdatSet(TestSpiCtrl.Id,TestSpiTxBuffer[TestSpiTxIndex]);
147  TestSpiTxIndex++;
148  }
149  }
150  }
151 }
152 void __irq TestSpiSpi1Isr(void){
153  INT8U Status;
154 
155  ClearPending(BIT_SPI1);
156  F_Spi1SpstaGet(TestSpiCtrl.Id,&Status);
157  if(Status&SPI0_DCOL_DETECT){
158  //printf("\nSPI0 collision error");
159  }
160  else if(Status&SPI0_MULF_DETECT){
161  //printf("\nSPI0 multi master error");
162  }
163  if(Status&SPI0_READY_DETECT){
164  if(TestSpiCtrl.Mode==TESTSPI_RECEIVE){
165  if(TestSpiRxIndex<TESTSPI_BUFFER_SIZE){
166  F_Spi1SprdatGet(TestSpiCtrl.Id,&TestSpiRxBuffer[TestSpiRxIndex]);
167  TestSpiRxIndex++;
168  }
169  }
170  else if(TestSpiCtrl.Mode==TESTSPI_TRANSMIT){
171  if(TestSpiTxIndex<TESTSPI_BUFFER_SIZE){
172  F_Spi1SptdatSet(TestSpiCtrl.Id,TestSpiTxBuffer[TestSpiTxIndex]);
173  TestSpiTxIndex++;
174  }
175  }
176  }
177 
178 
179 }
180 
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