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bootloader
drivers
uart0.c
Go to the documentation of this file.
1
/******************************************************
2
* Function: s3c2440 uart0 driver
3
*
4
* File: uart0.c
5
* Author: Book Chen
6
* Date: 2008.07.18
7
*******************************************************
8
*/
9
#include "
includes.h
"
10
11
#define Uart0TxIdleState 0
12
#define Uart0TxTransferState 1
13
14
#define Uart0RxIdleState 0
15
#define Uart0RxSpace0State 1
16
#define Uart0RxSpace1State 2
17
#define Uart0RxItem0State 3
18
#define Uart0RxItem1State 4
19
#define Uart0RxData0State 5
20
#define Uart0RxData1State 6
21
#define Uart0RxErrorState 7
22
#define Uart0RxFinishState 8
23
24
UART0_CONTROL
Uart0Ctrl
;
25
26
void
F_Uart0Init
(
void
);
27
void
F_Uart0Svc
(
void
);
28
void
F_Uart0BufferReset
(
void
);
29
INT8U
F_Uart0InUseCheck
(
void
);
30
INT8U
F_Uart0Allocate
(
INT16U
UserId);
31
INT8U
F_Uart0Release
(
INT16U
UserId);
32
INT8U
F_Uart0UlconSet
(
INT16U
UserId,
INT32U
Ulcon);
33
INT8U
F_Uart0UconSet
(
INT16U
UserId,
INT32U
Ucon);
34
INT8U
F_Uart0UmconSet
(
INT16U
UserId,
INT32U
Umcon);
35
INT8U
F_Uart0UtrstatGet
(
INT16U
UserId,
INT32U
*pUtrstat);
36
INT8U
F_Uart0UerstatGet
(
INT16U
UserId,
INT32U
*pUerstat);
37
INT8U
F_Uart0UfstatGet
(
INT16U
UserId,
INT32U
*pUfstat);
38
INT8U
F_Uart0UmstatGet
(
INT16U
UserId,
INT32U
*pUmstat);
39
INT8U
F_Uart0UtxhSet
(
INT16U
UserId,
INT32U
Utxh);
40
INT8U
F_Uart0UrxhGet
(
INT16U
UserId,
INT32U
*pUrxh);
41
INT8U
F_Uart0UbrdivSet
(
INT16U
UserId,
INT32U
ULCON);
42
INT8U
F_Uart0BaudrateConfig
(
INT16U
UserId,
INT32U
Baudrate);
43
INT8U
F_Uart0TxBufferCheck
(
void
);
44
INT8U
F_Uart0TxBufferCheckIsr
(
void
);
45
void
F_Uart0TxBufferPut
(
INT8U
);
46
INT8U
F_Uart0TxBufferGet
(
void
);
47
INT8U
F_Uart0TxBufferGetIsr
(
void
);
48
INT8U
F_Uart0RxBufferCheck
(
void
);
49
void
F_Uart0RxBufferPutIsr
(
INT8U
);
50
INT8U
F_Uart0RxBufferGet
(
void
);
51
void
F_Uart0RxBufferScan
(
void
);
52
void
putch
(
INT8
Data);
53
void
__irq
Uart0Isr
(
void
);
54
void
__irq
Uart0TxIsr
(
void
);
55
void
__irq
Uart0RxIntOrErrIsr
(
void
);
56
void
__irq
Uart0TxDmaDoneIsr
(
void
);
57
void
__irq
Uart0RxDmaDoneIsr
(
void
);
58
void
__irq
Uart0RxDmaOrErrIsr
(
void
);
59
void
__irq
Uart0TxFifoIsr
(
void
);
60
void
__irq
Uart0RxFifoOrErrIsr
(
void
);
61
void
__irq
Uart0AfcTxIsr
(
void
);
62
void
__irq
Uart0AfcRxOrErrIsr
(
void
);
63
64
void
F_Uart0Init
(
void
){
65
//******
66
// UART0 sfr initialize
67
//******
68
//rULCON0=0x00; // uart line control register
69
//rUCON0=0x00; // uart control register
70
//rUFCON0=0x00; // uart FIFO control register
71
//rUMCON0=0x00; // uart channel 0 moden control register
72
//Data=UTRSTAT0; // uart transmit receive status register
73
//Data=rUERSTAT0; // uart error status register
74
//Data=rUFSTAT0; // uart fifo status
75
//Data=rUMSTAT0; // uart moden status register
76
pISR_UART0
=(unsigned)
Uart0Isr
;
// isr hook function
77
Uart0Ctrl.
pUart0Register
=(
UART0_REGISTER
*)0x50000000;
78
Uart0Ctrl.
pUart0Register
->
ULCON
=0x00000000;
79
Uart0Ctrl.
pUart0Register
->
UCON
=0x00000000;
80
Uart0Ctrl.
pUart0Register
->
UFCON
=0x00000000;
81
Uart0Ctrl.
pUart0Register
->
UMCON
=0x00000000;
82
Uart0Ctrl.
pUart0Register
->
UTRSTAT
=0x00000006;
83
//Uart0Ctrl.pUart0Register->UERSTAT=0x00000000; // read only
84
//Uart0Ctrl.pUart0Register->UFSTAT=0x00000000; // read only
85
//Uart0Ctrl.pUart0Register->UMSTAT=0x00000000; // read only
86
//Uart0Ctrl.pUart0Register->UTXH=0x00000000; // write only
87
//Uart0Ctrl.pUart0Register->URXH=0x00000000; // read only
88
//Uart0Ctrl.pUart0Register->UBRDIV=0x00000000;
89
Uart0Ctrl.
Id
=
ID_UART0
;
90
Uart0Ctrl.
InUse
=
FALSE
;
91
Uart0Ctrl.
Status
=0;
92
Uart0Ctrl.
PortSelect
=0;
93
Uart0Ctrl.
TxBuffer
.
Get
=0;
94
Uart0Ctrl.
TxBuffer
.
Put
=0;
95
Uart0Ctrl.
RxBuffer
.
Get
=0;
96
Uart0Ctrl.
RxBuffer
.
Put
=0;
97
Uart0Ctrl.
UartTxTransmit
=0;
98
Uart0Ctrl.
TxState
=
Uart0TxIdleState
;
99
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
100
}
101
INT8U
F_Uart0InUseCheck
(
void
){
102
if
(Uart0Ctrl.
InUse
==
TRUE
)
return
TRUE
;
103
else
return
FALSE
;
104
}
105
INT8U
F_Uart0Allocate
(
INT16U
UserId){
106
if
(Uart0Ctrl.
InUse
==
FALSE
){
107
Uart0Ctrl.
InUse
=
TRUE
;
108
Uart0Ctrl.
UserId
=UserId;
109
return
TRUE
;
110
}
111
else
return
FALSE
;
112
}
113
INT8U
F_Uart0Release
(
INT16U
UserId){
114
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==
TRUE
)){
115
Uart0Ctrl.
InUse
=
FALSE
;
116
return
TRUE
;
117
}
118
else
return
FALSE
;
119
}
120
INT8U
F_Uart0UlconSet
(
INT16U
UserId,
INT32U
Ulcon){
121
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
122
Uart0Ctrl.
pUart0Register
->
ULCON
=Ulcon;
123
return
TRUE
;
124
}
125
else
return
FALSE
;
126
}
127
INT8U
F_Uart0UconSet
(
INT16U
UserId,
INT32U
Ucon){
128
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
129
Uart0Ctrl.
pUart0Register
->
UCON
=Ucon;
130
return
TRUE
;
131
}
132
else
return
FALSE
;
133
}
134
INT8U
F_Uart0UfconSet
(
INT16U
UserId,
INT32U
Ufcon){
135
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
136
Uart0Ctrl.
pUart0Register
->
UFCON
=Ufcon;
137
return
TRUE
;
138
}
139
else
return
FALSE
;
140
}
141
INT8U
F_Uart0UmconSet
(
INT16U
UserId,
INT32U
Umcon){
142
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
143
Uart0Ctrl.
pUart0Register
->
UMCON
=Umcon;
144
return
TRUE
;
145
}
146
else
return
FALSE
;
147
}
148
INT8U
F_Uart0UtrstatGet
(
INT16U
UserId,
INT32U
*pUtrstat){
149
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
150
*pUtrstat=Uart0Ctrl.
pUart0Register
->
UTRSTAT
;
151
return
TRUE
;
152
}
153
else
return
FALSE
;
154
}
155
INT8U
F_Uart0UerstatGet
(
INT16U
UserId,
INT32U
*pUerstat){
156
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
157
*pUerstat=Uart0Ctrl.
pUart0Register
->
UERSTAT
;
158
return
TRUE
;
159
}
160
else
return
FALSE
;
161
}
162
INT8U
F_Uart0UfstatGet
(
INT16U
UserId,
INT32U
*pUfstat){
163
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
164
*pUfstat=Uart0Ctrl.
pUart0Register
->
UFSTAT
;
165
return
TRUE
;
166
}
167
else
return
FALSE
;
168
}
169
INT8U
F_Uart0UmstatGet
(
INT16U
UserId,
INT32U
*pUmstat){
170
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
171
*pUmstat=Uart0Ctrl.
pUart0Register
->
UMSTAT
;
172
return
TRUE
;
173
}
174
else
return
FALSE
;
175
}
176
INT8U
F_Uart0UtxhSet
(
INT16U
UserId,
INT32U
Utxh){
177
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
178
Uart0Ctrl.
pUart0Register
->
UTXH
=Utxh;
179
return
TRUE
;
180
}
181
else
return
FALSE
;
182
}
183
INT8U
F_Uart0UrxhGet
(
INT16U
UserId,
INT32U
*pUrxh){
184
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
185
*pUrxh=Uart0Ctrl.
pUart0Register
->
URXH
;
186
return
TRUE
;
187
}
188
else
return
FALSE
;
189
}
190
INT8U
F_Uart0UbrdivSet
(
INT16U
UserId,
INT32U
Ubrdiv){
191
if
((Uart0Ctrl.
InUse
==
TRUE
)&&(Uart0Ctrl.
UserId
==UserId)){
192
Uart0Ctrl.
pUart0Register
->
UBRDIV
=Ubrdiv;
193
return
TRUE
;
194
}
195
else
return
FALSE
;
196
}
197
INT8U
F_Uart0BaudrateConfig
(
INT16U
UserId,
INT32U
Baudrate){
198
//INT32U ApbClock;
199
200
//if((Uart0Ctrl.InUse==TRUE)&&(Uart0Ctrl.UserId==UserId)){
201
//rUFCON0=0x00;
202
//rUFCON1=0x00;
203
//rUMCON0=0x00;
204
//rUMCON1=0x00;
205
//ApbClock=F_ClockMasterClockGet(); // get system advance peripheral bus Clock
206
//rULCON0 =0x3; // Normal,No parity,1 stop,8 bit per word...N81
207
//rUCON0 =0x045; // tx=pulse int
208
// rx=pulse int
209
// disable timeout int
210
// enable rx error int
211
// normal operation
212
// tx interrupt or polling mode
213
// rx interrupt or polling mode
214
//rUBRDIV0 =((int)(PCLK/(16.*Baudrate)+0.5)-1);
215
rUBRDIV0
=((int)(
PCLK
/(16.*Baudrate)+0.5)-1);
216
return
TRUE
;
217
//}
218
//else return FALSE;
219
}
220
void
F_Uart0Svc
(
void
){
221
INT8U
Data;
222
223
switch
(Uart0Ctrl.
TxState
){
224
case
Uart0TxIdleState
:
225
if
(Uart0Ctrl.
UartTxTransmit
==1)
break
;
226
if
(
F_Uart0TxBufferCheck
()==
UART0_BUFFER_EMPTY
)
break
;
227
Data=
F_Uart0TxBufferGet
();
228
Uart0Ctrl.
UartTxTransmit
=1;
229
WrUTXH0
(Data);
230
break
;
231
}
232
//F_Uart0RxBufferScan();
233
}
234
void
F_Uart0RxBufferScan
(
void
){
235
INT8U
Data;
236
237
switch
(Uart0Ctrl.
RxState
){
238
case
Uart0RxIdleState
:
239
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
240
Data=
F_Uart0RxBufferGet
();
241
//printf("\n Get a key %c \n",Data);
242
if
((Data==
'R'
)||(Data==
'r'
)){
243
Uart0Ctrl.
ActionType
=
Uart0ReadCmd
;
244
Uart0Ctrl.
RxState
=
Uart0RxSpace0State
;
245
}
246
else
if
((Data==
'W'
)||(Data==
'w'
)){
247
Uart0Ctrl.
ActionType
=
Uart0WriteCmd
;
248
Uart0Ctrl.
RxState
=
Uart0RxSpace0State
;
249
}
250
else
if
((Data==
'E'
)||(Data==
'e'
)){
251
Uart0Ctrl.
ActionType
=
Uart0Execution
;
252
Uart0Ctrl.
RxState
=
Uart0RxSpace0State
;
253
}
254
else
if
(Data==0x0d){
255
printf
(
"\n ARM:>"
);
256
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
// do nothing
257
}
258
else
{
259
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
260
}
261
break
;
262
case
Uart0RxSpace0State
:
263
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
264
Data=
F_Uart0RxBufferGet
();
265
if
(Data==
' '
){
266
Uart0Ctrl.
RxState
=
Uart0RxItem0State
;
267
}
268
else
{
269
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
270
}
271
break
;
272
case
Uart0RxItem0State
:
273
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
274
Data=
F_Uart0RxBufferGet
();
275
if
(Data==
' '
){
276
// no operation
277
}
278
else
if
((Data>=
'0'
)&&(Data<=
'9'
)){
279
Uart0Ctrl.
Input1
=Data-
'0'
;
280
Uart0Ctrl.
RxState
=
Uart0RxItem1State
;
281
}
282
else
if
((Data>=
'A'
)&&(Data<=
'F'
)){
283
Uart0Ctrl.
Input1
=Data-
'A'
+10;
284
Uart0Ctrl.
RxState
=
Uart0RxItem1State
;
285
}
286
else
if
((Data>=
'a'
)&&(Data<=
'f'
)){
287
Uart0Ctrl.
Input1
=Data-
'a'
+10;
288
Uart0Ctrl.
RxState
=
Uart0RxItem1State
;
289
}
290
else
{
291
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
292
}
293
break
;
294
case
Uart0RxItem1State
:
295
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
296
Data=
F_Uart0RxBufferGet
();
297
if
((Data>=
'0'
)&&(Data<=
'9'
)){
298
Uart0Ctrl.
Input2
=Data-
'0'
;
299
Uart0Ctrl.
Item
=Uart0Ctrl.
Input1
*16+Uart0Ctrl.
Input2
;
300
if
(Uart0Ctrl.
ActionType
==
Uart0WriteCmd
)
301
Uart0Ctrl.
RxState
=
Uart0RxSpace1State
;
302
else
303
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
304
}
305
else
if
((Data>=
'A'
)&&(Data<=
'F'
)){
306
Uart0Ctrl.
Input2
=Data-
'A'
+10;
307
Uart0Ctrl.
Item
=Uart0Ctrl.
Input1
*16+Uart0Ctrl.
Input2
;
308
if
(Uart0Ctrl.
ActionType
==
Uart0WriteCmd
)
309
Uart0Ctrl.
RxState
=
Uart0RxSpace1State
;
310
else
311
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
312
}
313
else
if
((Data>=
'a'
)&&(Data<=
'f'
)){
314
Uart0Ctrl.
Input2
=Data-
'a'
+10;
315
Uart0Ctrl.
Item
=Uart0Ctrl.
Input1
*16+Uart0Ctrl.
Input2
;
316
if
(Uart0Ctrl.
ActionType
==
Uart0WriteCmd
)
317
Uart0Ctrl.
RxState
=
Uart0RxSpace1State
;
318
else
319
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
320
}
321
else
if
(Data==
' '
){
322
Uart0Ctrl.
Item
=Uart0Ctrl.
Input1
;
323
if
(Uart0Ctrl.
ActionType
==
Uart0WriteCmd
)
324
Uart0Ctrl.
RxState
=
Uart0RxData0State
;
325
else
326
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
327
}
328
else
if
(Data==0x0d){
329
Uart0Ctrl.
Item
=Uart0Ctrl.
Input1
;
330
if
(Uart0Ctrl.
ActionType
==
Uart0WriteCmd
)
331
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
332
else
{
333
printf
(
"\n"
);
334
Uart0Ctrl.
HasInput
=
TRUE
;
335
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
336
}
337
}
338
else
{
339
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
340
}
341
break
;
342
case
Uart0RxSpace1State
:
343
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
344
Data=
F_Uart0RxBufferGet
();
345
if
(Data==
' '
) Uart0Ctrl.
RxState
=
Uart0RxData0State
;
346
else
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
347
break
;
348
case
Uart0RxData0State
:
349
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
350
Data=
F_Uart0RxBufferGet
();
351
if
(Data==
' '
){
352
// no operation
353
}
354
else
if
((Data>=
'0'
)&&(Data<=
'9'
)){
355
Uart0Ctrl.
Input1
=Data-
'0'
;
356
Uart0Ctrl.
RxState
=
Uart0RxData1State
;
357
}
358
else
if
((Data>=
'A'
)&&(Data<=
'F'
)){
359
Uart0Ctrl.
Input1
=Data-
'A'
+10;
360
Uart0Ctrl.
RxState
=
Uart0RxData1State
;
361
}
362
else
if
((Data>=
'a'
)&&(Data<=
'f'
)){
363
Uart0Ctrl.
Input1
=Data-
'a'
+10;
364
Uart0Ctrl.
RxState
=
Uart0RxData1State
;
365
}
366
else
{
367
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
368
}
369
break
;
370
case
Uart0RxData1State
:
371
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
372
Data=
F_Uart0RxBufferGet
();
373
if
((Data>=
'0'
)&&(Data<=
'9'
)){
374
Uart0Ctrl.
Input2
=Data-
'0'
;
375
Uart0Ctrl.
ItemData
=Uart0Ctrl.
Input1
*16+Uart0Ctrl.
Input2
;
376
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
377
}
378
else
if
((Data>=
'A'
)&&(Data<=
'F'
)){
379
Uart0Ctrl.
Input2
=Data-
'A'
+10;
380
Uart0Ctrl.
ItemData
=Uart0Ctrl.
Input1
*16+Uart0Ctrl.
Input2
;
381
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
382
}
383
else
if
((Data>=
'a'
)&&(Data<=
'f'
)){
384
Uart0Ctrl.
Input2
=Data-
'a'
+10;
385
Uart0Ctrl.
ItemData
=Uart0Ctrl.
Input1
*16+Uart0Ctrl.
Input2
;
386
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
387
}
388
else
if
(Data==
' '
){
389
Uart0Ctrl.
ItemData
=Uart0Ctrl.
Input1
;
390
Uart0Ctrl.
RxState
=
Uart0RxFinishState
;
391
}
392
else
if
(Data==0x0d){
393
printf
(
"\n"
);
394
Uart0Ctrl.
ItemData
=Uart0Ctrl.
Input1
;
395
Uart0Ctrl.
HasInput
=
TRUE
;
396
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
397
}
398
else
{
399
Uart0Ctrl.
RxState
=
Uart0RxErrorState
;
400
}
401
break
;
402
case
Uart0RxErrorState
:
403
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
404
Data=
F_Uart0RxBufferGet
();
405
if
(Data==0x0d){
406
printf
(
"\n Invalid input \n ARM:>"
);
407
Uart0Ctrl.
HasInput
=
FALSE
;
408
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
409
}
410
break
;
411
case
Uart0RxFinishState
:
412
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
;
413
Data=
F_Uart0RxBufferGet
();
414
if
(Data==0x0d){
415
printf
(
"\n"
);
416
Uart0Ctrl.
HasInput
=
TRUE
;
417
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
418
}
419
else
if
(Data==
' '
){
420
// nop
421
}
422
else
{
423
printf
(
"\n Invalid input \n ARM:>"
);
424
Uart0Ctrl.
HasInput
=
FALSE
;
425
Uart0Ctrl.
RxState
=
Uart0RxIdleState
;
426
}
427
break
;
428
}
429
}
430
void
F_Uart0BaudrateSet
(
INT32U
Baudrate){
431
//INT32U ApbClock;
432
433
//ApbClock=F_ClockMasterClockGet(); // get system advance peripheral bus Clock
434
//rUFCON0=0x00;
435
//rUMCON0=0x00;
436
rULCON0
=0x3;
// Normal,No parity,1 stop,8 bit per word...N81
437
rUCON0
=0x045;
// tx=pulse int
438
// rx=pulse int
439
// disable timeout int
440
// enable rx error int
441
// normal operation
442
// tx interrupt or polling mode
443
// rx interrupt or polling mode
444
rUBRDIV0
=((int)(
PCLK
/(16.*Baudrate)+0.5)-1);
445
}
446
void
F_Uart0CharTx
(
INT8
Data){
447
//while(F_Uart0TxBufferCheck()==UART0_BUFFER_FULL) F_Uart0TxSvc();
448
if
(Data==
'\n'
)
F_Uart0TxBufferPut
(
'\r'
);
// transmit 0x0a & 0x0d
449
//while(F_Uart0TxBufferCheck()==UART0_BUFFER_FULL) F_Uart0TxSvc();
450
F_Uart0TxBufferPut
((
INT8U
)Data);
451
}
452
INT8
F_Uart0RxCheck
(
void
){
453
if
(
F_Uart0RxBufferCheck
()!=
UART0_BUFFER_EMPTY
)
return
TRUE
;
454
else
return
FALSE
;
455
}
456
INT8
F_Uart0CharRx
(
void
){
457
INT8U
Data;
458
459
if
(
F_Uart0RxBufferCheck
()!=
UART0_BUFFER_EMPTY
){
460
Data=
F_Uart0RxBufferGet
();
461
return
(
INT8
)Data;
462
}
463
return
0;
464
}
465
void
F_Uart0StringTx
(
INT8
*pString){
466
while
(*pString!=0)
F_Uart0CharTx
(*pString++);
467
}
468
INT8U
F_Uart0TxBufferCheck
(
void
){
469
if
(Uart0Ctrl.
TxBuffer
.
Put
!=Uart0Ctrl.
TxBuffer
.
Get
){
470
if
(Uart0Ctrl.
TxBuffer
.
Put
==(
UART0_MAX_BUFFER_SIZE
-1)){
471
if
(Uart0Ctrl.
TxBuffer
.
Get
==0)
return
UART0_BUFFER_FULL
;
472
else
return
UART0_BUFFER_NOT_EMPTY
;
473
}
474
else
{
475
if
((Uart0Ctrl.
TxBuffer
.
Put
+1)==Uart0Ctrl.
TxBuffer
.
Get
)
return
UART0_BUFFER_FULL
;
476
else
return
UART0_BUFFER_NOT_EMPTY
;
477
}
478
}
479
else
return
UART0_BUFFER_EMPTY
;
480
}
481
INT8U
F_Uart0TxBufferCheckIsr
(
void
){
482
if
(Uart0Ctrl.
TxBuffer
.
Put
!=Uart0Ctrl.
TxBuffer
.
Get
){
483
if
(Uart0Ctrl.
TxBuffer
.
Put
==(
UART0_MAX_BUFFER_SIZE
-1)){
484
if
(Uart0Ctrl.
TxBuffer
.
Get
==0)
return
UART0_BUFFER_FULL
;
485
else
return
UART0_BUFFER_NOT_EMPTY
;
486
}
487
else
{
488
if
((Uart0Ctrl.
TxBuffer
.
Put
+1)==Uart0Ctrl.
TxBuffer
.
Get
)
return
UART0_BUFFER_FULL
;
489
else
return
UART0_BUFFER_NOT_EMPTY
;
490
}
491
}
492
else
return
UART0_BUFFER_EMPTY
;
493
}
494
void
F_Uart0TxBufferPut
(
INT8U
Data){
495
if
(
F_Uart0TxBufferCheck
()==
UART0_BUFFER_FULL
)
return
;
496
if
(Uart0Ctrl.
TxBuffer
.
Put
==(
UART0_MAX_BUFFER_SIZE
-1)){
497
Uart0Ctrl.
TxBuffer
.
Data
[Uart0Ctrl.
TxBuffer
.
Put
]=Data;
498
Uart0Ctrl.
TxBuffer
.
Put
=0;
499
}
500
else
{
501
Uart0Ctrl.
TxBuffer
.
Data
[Uart0Ctrl.
TxBuffer
.
Put
]=Data;
502
Uart0Ctrl.
TxBuffer
.
Put
++;
503
}
504
}
505
INT8U
F_Uart0TxBufferGet
(
void
){
506
INT8U
Data;
507
508
if
(
F_Uart0TxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
0;
509
if
(Uart0Ctrl.
TxBuffer
.
Get
==(
UART0_MAX_BUFFER_SIZE
-1)){
510
Data=Uart0Ctrl.
TxBuffer
.
Data
[Uart0Ctrl.
TxBuffer
.
Get
];
511
Uart0Ctrl.
TxBuffer
.
Get
=0;
512
}
513
else
{
514
Data=Uart0Ctrl.
TxBuffer
.
Data
[Uart0Ctrl.
TxBuffer
.
Get
];
515
Uart0Ctrl.
TxBuffer
.
Get
++;
516
}
517
return
Data;
518
}
519
INT8U
F_Uart0TxBufferGetIsr
(
void
){
520
INT8U
Data;
521
522
if
(
F_Uart0TxBufferCheckIsr
()==
UART0_BUFFER_EMPTY
)
return
0;
523
if
(Uart0Ctrl.
TxBuffer
.
Get
==(
UART0_MAX_BUFFER_SIZE
-1)){
524
Data=Uart0Ctrl.
TxBuffer
.
Data
[Uart0Ctrl.
TxBuffer
.
Get
];
525
Uart0Ctrl.
TxBuffer
.
Get
=0;
526
}
527
else
{
528
Data=Uart0Ctrl.
TxBuffer
.
Data
[Uart0Ctrl.
TxBuffer
.
Get
];
529
Uart0Ctrl.
TxBuffer
.
Get
++;
530
}
531
return
Data;
532
}
533
INT8U
F_Uart0RxBufferCheck
(
void
){
534
if
(Uart0Ctrl.
RxBuffer
.
Put
!=Uart0Ctrl.
RxBuffer
.
Get
){
535
if
(Uart0Ctrl.
RxBuffer
.
Put
==(
UART0_MAX_BUFFER_SIZE
-1)){
536
if
(Uart0Ctrl.
RxBuffer
.
Get
==0)
return
UART0_BUFFER_FULL
;
537
else
return
UART0_BUFFER_NOT_EMPTY
;
538
}
539
else
{
540
if
((Uart0Ctrl.
RxBuffer
.
Put
+1)==Uart0Ctrl.
RxBuffer
.
Get
)
return
UART0_BUFFER_FULL
;
541
else
return
UART0_BUFFER_NOT_EMPTY
;
542
}
543
}
544
else
return
UART0_BUFFER_EMPTY
;
545
}
546
INT8U
F_Uart0RxBufferCheckIsr
(
void
){
547
if
(Uart0Ctrl.
RxBuffer
.
Put
!=Uart0Ctrl.
RxBuffer
.
Get
){
548
if
(Uart0Ctrl.
RxBuffer
.
Put
==(
UART0_MAX_BUFFER_SIZE
-1)){
549
if
(Uart0Ctrl.
RxBuffer
.
Get
==0)
return
UART0_BUFFER_FULL
;
550
else
return
UART0_BUFFER_NOT_EMPTY
;
551
}
552
else
{
553
if
((Uart0Ctrl.
RxBuffer
.
Put
+1)==Uart0Ctrl.
RxBuffer
.
Get
)
return
UART0_BUFFER_FULL
;
554
else
return
UART0_BUFFER_NOT_EMPTY
;
555
}
556
}
557
else
return
UART0_BUFFER_EMPTY
;
558
}
559
void
F_Uart0RxBufferPutIsr
(
INT8U
Data){
560
if
(
F_Uart0RxBufferCheckIsr
()==
UART0_BUFFER_FULL
)
return
;
561
if
(Uart0Ctrl.
RxBuffer
.
Put
==(
UART0_MAX_BUFFER_SIZE
-1)){
562
Uart0Ctrl.
RxBuffer
.
Data
[Uart0Ctrl.
RxBuffer
.
Put
]=Data;
563
Uart0Ctrl.
RxBuffer
.
Put
=0;
564
}
565
else
{
566
Uart0Ctrl.
RxBuffer
.
Data
[Uart0Ctrl.
RxBuffer
.
Put
]=Data;
567
Uart0Ctrl.
RxBuffer
.
Put
++;
568
}
569
}
570
INT8U
F_Uart0RxBufferGet
(
void
){
571
INT8U
Data;
572
573
if
(
F_Uart0RxBufferCheck
()==
UART0_BUFFER_EMPTY
)
return
0;
574
if
(Uart0Ctrl.
RxBuffer
.
Get
==(
UART0_MAX_BUFFER_SIZE
-1)){
575
Data=Uart0Ctrl.
RxBuffer
.
Data
[Uart0Ctrl.
RxBuffer
.
Get
];
576
Uart0Ctrl.
RxBuffer
.
Get
=0;
577
}
578
else
{
579
Data=Uart0Ctrl.
RxBuffer
.
Data
[Uart0Ctrl.
RxBuffer
.
Get
];
580
Uart0Ctrl.
RxBuffer
.
Get
++;
581
}
582
return
Data;
583
}
584
void
F_Uart0BufferReset
(
void
){
585
Uart0Ctrl.
TxBuffer
.
Get
=0;
586
Uart0Ctrl.
TxBuffer
.
Put
=0;
587
Uart0Ctrl.
RxBuffer
.
Get
=0;
588
Uart0Ctrl.
RxBuffer
.
Put
=0;
589
}
590
void
putch
(
INT8
Data){
591
F_Uart0CharTx
(Data);
592
}
593
void
puts
(
INT8
*pString){
594
F_Uart0StringTx
(pString);
595
}
596
INT8
kbhit
(
void
){
597
if
(
F_Uart0RxCheck
()==
TRUE
)
return
1;
598
else
return
0;
599
}
600
INT8
getkey
(
void
){
601
INT8
Data;
602
603
Data=
F_Uart0CharRx
();
// Data==0...key not exist
604
return
Data;
605
}
606
INT8
getch
(
void
){
607
INT8
key;
608
609
while
(1){
610
key=
getkey
();
611
if
(key!=0)
return
key;
612
F_Uart0Svc
();
// receive uart data using polling mode
613
}
614
}
615
INT32
strlen
(
const
char
*String){
616
INT32U
Length;
617
618
Length=0;
619
for
(;*String!=0;String++) Length++;
620
return
Length;
621
}
622
typedef
int
*
__va_list
[1];
623
int
vsprintf
(
char
*,
const
char
*,
__va_list
);
624
void
printf
(
char
*Format, ...){
625
va_list Ap;
626
INT8
String[1024];
627
628
va_start(Ap,Format);
629
vsprintf
(String,Format,Ap);
630
puts
(String);
631
va_end(Ap);
632
}
633
void
F_Uart0RxIsr
(
void
){
634
unsigned
char
Data;
635
636
Data=
RdURXH0
();
637
}
638
void
F_Uart0RxError
(
void
){
639
if
(
rUERSTAT0
&
UART0_UERSTAT0_OVERRUN_ERROR
){
640
//Printf("Overrun error\n");
641
}
642
else
if
(
rUERSTAT0
&
UART0_UERSTAT0_FRAME_ERROR0
){
643
//Printf("Overrun error\n");
644
}
645
else
if
(
rUERSTAT0
&
UART0_UERSTAT0_FRAME_ERROR1
){
646
//Printf("Overrun error\n");
647
}
648
else
if
(
rUERSTAT0
&
UART0_UERSTAT0_FRAME_ERROR2
){
649
//Printf("Overrun error\n");
650
}
651
else
{
652
//Printf("Unknow error\n");
653
}
654
}
655
void
__irq
Uart0Isr
(
void
){
656
unsigned
char
Data;
657
658
ClearSubPending
(
BIT_SUB_RXD0
|
BIT_SUB_TXD0
|
BIT_SUB_ERR0
);
659
ClearPending
(
BIT_UART0
);
660
if
(
rUTRSTAT0
&
UART0_UTRSTAT0_TX
){
// tx int
661
if
(
F_Uart0TxBufferCheckIsr
()==
UART0_BUFFER_EMPTY
){
662
Uart0Ctrl.
UartTxTransmit
=0;
663
}
664
else
{
665
Data=
F_Uart0TxBufferGetIsr
();
666
//Uart0Ctrl.UartTxTransmit=1;
667
WrUTXH0
(Data);
668
}
669
//Uart0Ctrl.UartTxTransmit=0;
670
//rSUBSRCPND=(BIT_SUB_TXD0); // Clear Sub int pending
671
}
672
if
(
rUTRSTAT0
&
UART0_UTRSTAT0_RX
){
// rx int
673
Data=
RdURXH0
();
674
F_Uart0RxBufferPutIsr
(Data);
675
//rSUBSRCPND=(BIT_SUB_RXD0); // Clear Sub int pending
676
}
677
if
(
rUERSTAT0
&0x0f){
678
F_Uart0RxError
();
// error int
679
//rSUBSRCPND=(BIT_SUB_ERR0); // Clear Sub int pending
680
}
681
//rSRCPND=BIT_UART0;
682
//rINTPND=BIT_UART0;
683
}
684
void
__irq
Uart0TxIntIsr
(
void
){
685
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0); // Just for the safety
686
ClearPending
(
BIT_UART0
);
// Clear master pending
687
rSUBSRCPND
=(
BIT_SUB_TXD0
);
// Clear Sub int pending
688
Uart0Ctrl.
UartTxTransmit
=0;
// clear transfer flag
689
//rINTSUBMSK&=~(BIT_SUB_TXD0); // Unmask sub int
690
rINTSUBMSK
&=~(
BIT_SUB_RXD0
|
BIT_SUB_ERR0
);
691
}
692
void
__irq
Uart0RxIntOrErrIsr
(
void
){
693
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0);
694
if
(
rSUBSRCPND
&
BIT_SUB_RXD0
)
F_Uart0RxIsr
();
//__sub_Uart0_RxInt();
695
else
F_Uart0RxError
();
696
rSUBSRCPND
=(BIT_SUB_RXD0|
BIT_SUB_ERR0
);
// Clear Sub int pending
697
ClearPending
(
BIT_UART0
);
698
//rINTSUBMSK&=~(BIT_SUB_RXD0|BIT_SUB_ERR0);
699
}
700
void
__irq
Uart0TxDmaDoneIsr
(
void
){
701
rDMASKTRIG0
=0x0;
// Stop Dma0
702
Uart0Ctrl.
UartTxDma
=0;
// clear dma flag
703
//rINTMSK |= BIT_DMA0; // need this line??
704
ClearPending
(
BIT_DMA0
);
705
}
706
void
__irq
Uart0RxDmaDoneIsr
(
void
){
707
rDMASKTRIG0
=0x0;
// DMA0 Channel Off
708
Uart0Ctrl.
UartRxDma
=1;
// set uart0 dma rx stop
709
//*(uart0RxStr+5)='\0'; // ??
710
rINTMSK
|=(
BIT_DMA0
);
711
ClearPending
(
BIT_DMA0
);
712
}
713
void
__irq
Uart0RxDmaOrErrIsr
(
void
){
//??
714
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0);
715
//if(rSUBSRCPND&BIT_SUB_ERR0) {} //Uart_Printf("Error : UART0 Rx Interrupt is occured!!!\n");
716
//else F_Uart0RxError();
717
rSUBSRCPND
=
BIT_SUB_ERR0
;
// Clear Sub int pending
718
ClearPending
(
BIT_UART0
);
719
//rINTSUBMSK&=~(BIT_SUB_ERR0);
720
}
721
void
__irq
Uart0TxFifoIsr
(
void
){
722
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0); // Just for the safety
723
//rINTMSK|=BIT_UART0; // disable int
724
rSUBSRCPND
=
BIT_SUB_TXD0
;
// Clear Sub int pending
725
ClearPending
(
BIT_UART0
);
// Clear master pending
726
//rINTSUBMSK&=~(BIT_SUB_TXD0); // Unmask sub int
727
}
728
void
__irq
Uart0RxFifoOrErrIsr
(
void
){
729
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0);
730
//if(rSUBSRCPND&BIT_SUB_RXD0) __sub_Uart0_RxFifo();
731
//else F_Uart0RxError();
732
rSUBSRCPND
=(
BIT_SUB_RXD0
|
BIT_SUB_ERR0
);
// Clear Sub int pending
733
ClearPending
(
BIT_UART0
);
734
//rINTSUBMSK&=~(BIT_SUB_RXD0|BIT_SUB_ERR0);
735
}
736
void
__irq
Uart0AfcTxIsr
(
void
){
737
unsigned
char
Data;
738
739
Data=
'B'
;
740
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0);
741
if
(Uart0Ctrl.
UartAfcTxCnt
<
UART0_AFC_BUFFER_LENGTH
)
WrUTXH0
(Data);
742
else
Uart0Ctrl.
UartAfcTx
=0;
// clear UART AFC TX FLAG
743
rSUBSRCPND
=(
BIT_SUB_TXD0
);
744
ClearPending
(
BIT_UART0
);
745
//rINTSUBMSK&=~(BIT_SUB_TXD0);
746
//rINTMSK|=BIT_UART0;
747
}
748
void
F_Uart0AfcRxIsr
(
void
){
749
while
((
rUFSTAT0
&0x100)||((
rUFSTAT0
&0xf)>0)){
750
//*rxdataPt=rURXH0;
752
Uart0Ctrl.
UartAfcRxCnt
++;
753
}
754
if
(Uart0Ctrl.
UartAfcRxCnt
==
UART0_AFC_BUFFER_LENGTH
){
755
Uart0Ctrl.
UartAfcRx
=1;
// clear AFC Rx flag
756
//rINTMSK|=BIT_UART0; // disable uart irq...afc rx finish
757
}
758
}
759
void
__irq
Uart0AfcRxOrErrIsr
(
void
){
760
//rINTSUBMSK|=(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0);
761
if
(
rSUBSRCPND
&
BIT_SUB_RXD0
)
F_Uart0AfcRxIsr
();
//__sub_Uart0_RxAfc();
762
else
F_Uart0RxError
();
//__sub_Uart0_RxErrInt();
763
764
rSUBSRCPND
=(BIT_SUB_RXD0|
BIT_SUB_TXD0
|
BIT_SUB_ERR0
);
765
ClearPending
(
BIT_UART0
);
766
//rINTSUBMSK&=~(BIT_SUB_RXD0|BIT_SUB_TXD0|BIT_SUB_ERR0);
767
}
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