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usbdevice.h
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1 #ifndef USBDEVICE_H
2 #define USBDEVICE_H
3 
4 //*************************************************************************
5 // USB definitons
6 //*************************************************************************
7 /* Power Management Register */
8 #define DISABLE_SUSPEND 0x00
9 #define ENABLE_SUSPEND 0x01
10 #define SUSPEND_MODE 0x02
11 #define MCU_RESUME 0x04
12 #define ISO_UPDATE (1<<7)
13 
14 /* MAXP Register */
15 #define FIFO_SIZE_0 0x00 /* 0x00 * 8 = 0 */
16 #define FIFO_SIZE_8 0x01 /* 0x01 * 8 = 8 */
17 #define FIFO_SIZE_16 0x02 /* 0x02 * 8 = 16 */
18 #define FIFO_SIZE_32 0x04 /* 0x04 * 8 = 32 */
19 #define FIFO_SIZE_64 0x08 /* 0x08 * 8 = 64 */
20 
21 /* ENDPOINT0 CSR (Control Status Register) : Mapped to IN CSR1 */
22 #define EP0_OUT_PKT_READY 0x01 /* USB sets, MCU clears by setting SERVICED_OUT_PKT_RDY */
23 #define EP0_IN_PKT_READY 0x02 /* MCU sets, USB clears after sending FIFO */
24 #define EP0_SENT_STALL 0x04 /* USB sets */
25 #define EP0_DATA_END 0x08 /* MCU sets */
26 #define EP0_SETUP_END 0x10 /* USB sets, MCU clears by setting SERVICED_SETUP_END */
27 #define EP0_SEND_STALL 0x20 /* MCU sets */
28 #define EP0_SERVICED_OUT_PKT_RDY 0x40 /* MCU writes 1 to clear OUT_PKT_READY */
29 #define EP0_SERVICED_SETUP_END 0x80 /* MCU writes 1 to clear SETUP_END */
30 
31 #define EP0_WR_BITS 0xc0
32 
33 //EP_INT_REG / EP_INT_EN_REG
34 #define EP0_INT 0x01 // Endpoint 0, Control
35 #define EP1_INT 0x02 // Endpoint 1, (Bulk-In)
36 #define EP2_INT 0x04 // Endpoint 2
37 #define EP3_INT 0x08 // Endpoint 3, (Bulk-Out)
38 #define EP4_INT 0x10 // Endpoint 4
39 
40 //USB_INT_REG / USB_INT_EN_REG
41 #define SUSPEND_INT 0x01
42 #define RESUME_INT 0x02
43 #define RESET_INT 0x04
44 
45 //IN_CSR1
46 #define EPI_IN_PKT_READY 0x01
47 #define EPI_UNDER_RUN 0x04
48 #define EPI_FIFO_FLUSH 0x08
49 #define EPI_SEND_STALL 0x10
50 #define EPI_SENT_STALL 0x20
51 #define EPI_CDT 0x40
52 #define EPI_WR_BITS (EPI_FIFO_FLUSH|EPI_IN_PKT_READY|EPI_CDT)
53  //(EPI_FIFO_FLUSH) is preferred (???)
54 //IN_CSR2
55 #define EPI_IN_DMA_INT_MASK (1<<4)
56 #define EPI_MODE_IN (1<<5)
57 #define EPI_MODE_OUT (0<<5)
58 #define EPI_ISO (1<<6)
59 #define EPI_BULK (0<<6)
60 #define EPI_AUTO_SET (1<<7)
61 
62 //OUT_CSR1
63 #define EPO_OUT_PKT_READY 0x01
64 #define EPO_OVER_RUN 0x04
65 #define EPO_DATA_ERROR 0x08
66 #define EPO_FIFO_FLUSH 0x10
67 #define EPO_SEND_STALL 0x20
68 #define EPO_SENT_STALL 0x40
69 #define EPO_CDT 0x80
70 #define EPO_WR_BITS (EPO_FIFO_FLUSH|EPO_SEND_STALL|EPO_CDT)
71  //(EPO_FIFO_FLUSH) is preferred (???)
72 
73 //OUT_CSR2
74 #define EPO_OUT_DMA_INT_MASK (1<<5)
75 #define EPO_ISO (1<<6)
76 #define EPO_BULK (0<<6)
77 #define EPO_AUTO_CLR (1<<7)
78 
79 //USB DMA control register
80 #define UDMA_IN_RUN_OB (1<<7)
81 #define UDMA_IGNORE_TTC (1<<7)
82 #define UDMA_DEMAND_MODE (1<<3)
83 #define UDMA_OUT_RUN_OB (1<<2)
84 #define UDMA_OUT_DMA_RUN (1<<2)
85 #define UDMA_IN_DMA_RUN (1<<1)
86 #define UDMA_DMA_MODE_EN (1<<0)
87 
88 #define rEP1_DMA_TTC (rEP1_DMA_TTC_L+(rEP1_DMA_TTC_M<<8)+(rEP1_DMA_TTC_H<<16))
89 #define rEP2_DMA_TTC (rEP2_DMA_TTC_L+(rEP2_DMA_TTC_M<<8)+(rEP2_DMA_TTC_H<<16))
90 #define rEP3_DMA_TTC (rEP3_DMA_TTC_L+(rEP3_DMA_TTC_M<<8)+(rEP3_DMA_TTC_H<<16))
91 #define rEP4_DMA_TTC (rEP4_DMA_TTC_L+(rEP4_DMA_TTC_M<<8)+(rEP4_DMA_TTC_H<<16))
92 
93 #define ADDR_EP0_FIFO (0x520001c0) //Endpoint 0 FIFO
94 #define ADDR_EP1_FIFO (0x520001c4) //Endpoint 1 FIFO
95 #define ADDR_EP2_FIFO (0x520001c8) //Endpoint 2 FIFO
96 #define ADDR_EP3_FIFO (0x520001cc) //Endpoint 3 FIFO
97 #define ADDR_EP4_FIFO (0x520001d0) //Endpoint 4 FIFO
98 
99 //If you chane the packet size, the source code should be changed!!!
100 #define EP0_PKT_SIZE 8
101 #define EP1_PKT_SIZE BULK_PKT_SIZE
102 #define EP3_PKT_SIZE BULK_PKT_SIZE
103 
104 //USB Device Options
105 //#define USBDMA TRUE
106 //#define USBDMA_DEMAND FALSE //the downloadFileSize should be (64*n)
107 //#define BULK_PKT_SIZE 32
108 
109 #define PWR_REG_DEFAULT_VALUE (DISABLE_SUSPEND)
110 
111 //************************
112 // Endpoint 0
113 //************************
114 
115 // Standard bmRequestTyje (Direction)
116 #define HOST_TO_DEVICE (0x00)
117 #define DEVICE_TO_HOST (0x80)
118 
119 // Standard bmRequestType (Type)
120 #define STANDARD_TYPE (0x00)
121 #define CLASS_TYPE (0x20)
122 #define VENDOR_TYPE (0x40)
123 #define RESERVED_TYPE (0x60)
124 
125 // Standard bmRequestType (Recipient)
126 #define DEVICE_RECIPIENT (0)
127 #define INTERFACE_RECIPIENT (1)
128 #define ENDPOINT_RECIPIENT (2)
129 #define OTHER_RECIPIENT (3)
130 
131 // Feature Selectors
132 #define DEVICE_REMOTE_WAKEUP (1)
133 #define EP_STALL (0)
134 
135 // Standard Request Codes
136 #define GET_STATUS (0)
137 #define CLEAR_FEATURE (1)
138 #define SET_FEATURE (3)
139 #define SET_ADDRESS (5)
140 #define GET_DESCRIPTOR (6)
141 #define SET_DESCRIPTOR (7)
142 #define GET_CONFIGURATION (8)
143 #define SET_CONFIGURATION (9)
144 #define GET_INTERFACE (10)
145 #define SET_INTERFACE (11)
146 #define SYNCH_FRAME (12)
147 
148 // Class-specific Request Codes
149 #define GET_DEVICE_ID (0)
150 #define GET_PORT_STATUS (1)
151 #define SOFT_RESET (2)
152 
153 // Descriptor Types
154 #define DEVICE_TYPE (1)
155 #define CONFIGURATION_TYPE (2)
156 #define STRING_TYPE (3)
157 #define INTERFACE_TYPE (4)
158 #define ENDPOINT_TYPE (5)
159 
160 //configuration descriptor: bmAttributes
161 #define CONF_ATTR_DEFAULT (0x80) //Spec 1.0 it was BUSPOWERED bit.
162 #define CONF_ATTR_REMOTE_WAKEUP (0x20)
163 #define CONF_ATTR_SELFPOWERED (0x40)
164 
165 //endpoint descriptor
166 #define EP_ADDR_IN (0x80)
167 #define EP_ADDR_OUT (0x00)
168 
169 #define EP_ATTR_CONTROL (0x0)
170 #define EP_ATTR_ISOCHRONOUS (0x1)
171 #define EP_ATTR_BULK (0x2)
172 #define EP_ATTR_INTERRUPT (0x3)
173 
174 //string descriptor
175 #define LANGID_US_L (0x09)
176 #define LANGID_US_H (0x04)
177 
178 typedef struct{
179  INT8U bmRequestType;
180  INT8U bRequest;
181  INT8U bValueL;
182  INT8U bValueH;
183  INT8U bIndexL;
184  INT8U bIndexH;
185  INT8U bLengthL;
186  INT8U bLengthH;
187 }USBDEVICE_SETUP_DATA;
188 typedef struct{
189  INT8U bLength;
190  INT8U bDescriptorType;
191  INT8U bcdUSBL;
192  INT8U bcdUSBH;
193  INT8U bDeviceClass;
194  INT8U bDeviceSubClass;
195  INT8U bDeviceProtocol;
196  INT8U bMaxPacketSize0;
197  INT8U idVendorL;
198  INT8U idVendorH;
199  INT8U idProductL;
200  INT8U idProductH;
201  INT8U bcdDeviceL;
202  INT8U bcdDeviceH;
203  INT8U iManufacturer;
204  INT8U iProduct;
205  INT8U iSerialNumber;
206  INT8U bNumConfigurations;
207 }USBDEVICE_DEVICE_DESCRIPTOR;
208 typedef struct{
209  INT8U bLength;
210  INT8U bDescriptorType;
211  INT8U wTotalLengthL;
212  INT8U wTotalLengthH;
213  INT8U bNumInterfaces;
214  INT8U bConfigurationValue;
215  INT8U iConfiguration;
216  INT8U bmAttributes;
217  INT8U maxPower;
218 }USBDEVICE_CONFIGURATION_DESCRIPTOR;
219 typedef struct{
220  INT8U bLength;
221  INT8U bDescriptorType;
222  INT8U bInterfaceNumber;
223  INT8U bAlternateSetting;
224  INT8U bNumEndpoints;
225  INT8U bInterfaceClass;
226  INT8U bInterfaceSubClass;
227  INT8U bInterfaceProtocol;
228  INT8U iInterface;
229 }USBDEVICE_INTERFACE_DESCRIPTOR;
230 typedef struct{
231  INT8U bLength;
232  INT8U bDescriptorType;
233  INT8U bEndpointAddress;
234  INT8U bmAttributes;
235  INT8U wMaxPacketSizeL;
236  INT8U wMaxPacketSizeH;
237  INT8U bInterval;
238 }USBDEVICE_ENDPOINT_DESCRIPTOR;
239 typedef struct{
240  INT8U State;
241  INT8U Status;
242  INT8U InUse;
243  INT16U Id;
244  INT16U UserId;
245  INT32U RxAddress;
246  INT32U TxAddress;
247  INT32U RxLength;
248  INT32U TxLength;
249  INT8U *pRxData;
250  INT8U *pTxData;
251  INT8U Ep0State;
252  INT8U Ep0SubState;
253  INT8U Ep1State;
254  INT8U Ep2State;
255  INT8U Ep3State;
256  INT8U Ep4State;
257  INT8U ConfigStatus;
258  INT8U Function;
259  USBDEVICE_SETUP_DATA SetupData;
260  USBDEVICE_DEVICE_DESCRIPTOR DeviceDescrip;
261  USBDEVICE_CONFIGURATION_DESCRIPTOR ConfigurationDescrip;
262  USBDEVICE_INTERFACE_DESCRIPTOR InterfaceDescrip;
263  USBDEVICE_ENDPOINT_DESCRIPTOR EndpointDescrip0;
264  USBDEVICE_ENDPOINT_DESCRIPTOR EndpointDescrip1;
265 }USBDEVICE_CONTROL;
266 typedef struct{
267  INT8U State;
268  INT8U Status;
269 }ENDPOINT0_CONTROL;
270 typedef struct{
271  INT8U State;
272  INT8U Status;
273  INT8U Data[EP1_PKT_SIZE];
274  INT32U TransferIndex;
275 }ENDPOINT1_CONTROL;
276 typedef struct{
277  INT8U State;
278  INT8U Status;
279 }ENDPOINT2_CONTROL;
280 typedef struct{
281  INT8U State;
282  INT8U Status;
283  INT16U CheckSum;
284  INT32U ActionType;
285  INT8U Data[EP3_PKT_SIZE];
286 }ENDPOINT3_CONTROL;
287 typedef struct{
288  INT8U State;
289  INT8U Status;
290 }ENDPOINT4_CONTROL;
291 
292 extern USBDEVICE_CONTROL UsbDeviceCtrl;
293 
294 extern void F_UsbDeviceInit(void);
295 extern void F_UsbDeviceSvc(void);
296 
297 #endif
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