A Simple operation System using S3C2410: extdrivers/cs8900.c Source File

00001 //==========
00002 // Project name: MyArm920t 
00003 // Author: Book Chen
00004 // Start time: 2007.06.04
00005 // Function: Driver of ethernet controller CS8900
00006 //==========
00007 #include "includes.h"
00008 
00009 #define Cs8900IdleState     0
00010 #define Cs8900InitialState0 1
00011 #define Cs8900InitialState1 2
00012 #define Cs8900InitialState2 3
00013 #define Cs8900InitialState3 4
00014 #define Cs8900InitialState4 5
00015 
00016 #define MAX_COUNT 0x00100000
00017 
00018 CS8900_CONTROL Cs8900Ctrl;
00019 
00020 #define F_Cs8900IoRead(Offset)            ((INT16U)*((volatile INT16U*)(Cs8900Ctrl.IoBase+(Offset))))
00021 #define F_Cs8900IoWrite(Offset,Data)     *((volatile INT16U*)(Cs8900Ctrl.IoBase+(Offset)))=(INT16U)(Data)
00022 #define F_Cs8900MemryRead(Offset)         ((INT16U)*((volatile INT16U*)(Cs8900Ctrl.MemBase+(Offset))))
00023 #define F_Cs8900MemoryWrite(Offset,Data) *((volatile INT16U*)(Cs8900Ctrl.MemBase+(Offset)))=(INT16U)(Data)
00024 #define CS8900_MEMORY_MODE 0
00025 #if(CS8900_MEMORY_MODE==1)
00026     #define F_Cs8900RegisterRead1  F_Cs8900RegisterRead
00027     #define F_Cs8900RegisterRead2  F_Cs8900MemryRead 
00028     #define F_Cs8900RegisterWrite1 F_Cs8900RegisterWrite
00029     #define F_Cs8900RegisterWrite2 F_Cs8900MemoryWrite
00030 #else
00031     #define F_Cs8900RegisterRead1  F_Cs8900RegisterRead
00032     #define F_Cs8900RegisterRead2  F_Cs8900RegisterRead
00033     #define F_Cs8900RegisterWrite1 F_Cs8900RegisterWrite
00034     #define F_Cs8900RegisterWrite2 F_Cs8900RegisterWrite
00035 #endif
00036 void F_Cs8900Init(void);
00037 void F_Cs8900Svc(void);
00038 INT8U F_Cs8900InUseCheck(void);
00039 INT8U F_Cs8900Allocate(INT16U UserId);
00040 INT8U F_Cs8900Release(INT16U UserId);
00041 INT8U F_Cs8900InitialStart(INT16U UserId);
00042 INT8U F_Cs8900MacAddressSet(INT16U UserId,INT8U *pMacAddress);
00043 INT8U F_Cs8900IpAddressSet(INT16U UserId,INT8U *pIpAddress);
00044 INT8U F_Cs8900InitialPassCheck(void);
00045 INT16U F_Cs8900RegisterRead(INT16U Offset);
00046 void F_Cs8900RegisterWrite(INT16U Offset,INT16U Data);
00047 void F_Cs8900IrqEnable(void);
00048 INT32U F_Cs8900PacketReceive(INT8U *pPacketData,INT32U PacketLength);
00049 INT8U F_Cs8900PacketTransmit(INT8U *pPacketData,INT16U PacketLength);
00050 INT8U F_Cs8900PacketReceiveCheck(void);
00051 INT8U F_Cs8900Link(void);
00052 
00053 void F_Cs8900Init(void){
00054     Cs8900Ctrl.InitialPass=FALSE;
00055     Cs8900Ctrl.IoBase=CS8900_ADDRESS;
00056     Cs8900Ctrl.MemBase=0;
00057     //Cs8900Ctrl.Id=ID_CS8900;
00058     Cs8900Ctrl.InUse=FALSE;    
00059     Cs8900Ctrl.State=Cs8900IdleState;                                                                      
00060 }
00061 void F_Cs8900Svc(void){
00062     INT16U i;
00063     INT16U *pMac;
00064     
00065     switch(Cs8900Ctrl.State){
00066         case Cs8900IdleState:
00067             break;
00068         case Cs8900InitialState0:
00069             Cs8900Ctrl.InitialPass=FALSE;
00070             // SPEC. 3.3.3 bus reset consideration 
00071             // IO_PACKET_PAGE_POINTER has sigunature 3000h.                     
00072             i=F_Cs8900IoRead(IO_PACKET_PAGE_POINTER);
00073             #if(DEBUG_CS8900==1)
00074                 myprintf("\n sigunature %8x",i);
00075             #endif
00076             if((i&CS8900_SIGNATURE_MASK)!=CS8900_SIGNATURE_MASK){            
00077                 #if(DEBUG_CS8900==1)
00078                     myprintf("\n sigunature error");
00079                 #endif    
00080                 Cs8900Ctrl.State=Cs8900IdleState;
00081                 return;        
00082             }    
00083             // SPEC. 4.3.1 bus interface register EISA number
00084             // EISA NUMBER 0x630E
00085             i=F_Cs8900RegisterRead1(PKTPG_EISA_NUMBER);
00086             #if(DEBUG_CS8900==1)
00087                 myprintf("\n EISA number %8x",i);
00088             #endif            
00089             if(i!=CS8900_EISA_NUMBER){
00090                 #if(DEBUG_CS8900==1)
00091                     myprintf("\n EISA number error");
00092                 #endif                              
00093                 Cs8900Ctrl.State=Cs8900IdleState;
00094                 return;        
00095             }
00096             // SPEC. 4.3.1 bus interface register ID code's 0s
00097             i=F_Cs8900RegisterRead1(PKTPG_PRDCT_ID_CODE);
00098             #if(DEBUG_CS8900==1)
00099                 myprintf("\n CS8900_PRDCT_ID %8x",i);        
00100             #endif    
00101             if((i&CS8900_PRDCT_ID_MASK)!=CS8900_PRDCT_ID){
00102                 #if(DEBUG_CS8900==1)
00103                     myprintf("\n product ID error");
00104                 #endif    
00105                 Cs8900Ctrl.State=Cs8900IdleState;
00106                 return;        
00107             }
00108             i=F_Cs8900RegisterRead1(PKTPG_IO_BASE_ADDR);
00109             #if(DEBUG_CS8900==1)
00110                 myprintf("\n PKTPG_IO_BASE_ADDR %8x",i);                
00111                 myprintf("\n CS8900 detected");       
00112             #endif    
00113             F_Cs8900RegisterWrite1(PKTPG_SELF_CTL,(SELF_CTL_RESET|SELF_CTL_LOW_BITS));     
00114             Cs8900Ctrl.State=Cs8900InitialState1;
00115             break;
00116         case Cs8900InitialState1:
00117             if((F_Cs8900RegisterRead1(PKTPG_SELF_ST)&SELF_ST_INITD)==0) return; // wait cs8900 goes ready            
00118             #if(DEBUG_CS8900==1)
00119                 myprintf("\n initial ok ");
00120             #endif
00121             Cs8900Ctrl.State=Cs8900InitialState2;           
00122             break;
00123          case Cs8900InitialState2:
00124             if((F_Cs8900RegisterRead1(PKTPG_SELF_ST)&SELF_ST_SIBUSY)!=0) return; // wait cs8900 goes ready            
00125             #if(DEBUG_CS8900==1)
00126                 myprintf("\n initial done ");
00127             #endif
00128             Cs8900Ctrl.State=Cs8900InitialState3;           
00129             break;    
00130         case Cs8900InitialState3:                            
00131             // set 10 base T and mode back off
00132             i=F_Cs8900RegisterRead2(PKTPG_LINE_CTL)|LINE_CTL_10_BASE_T|LINE_CTL_MOD_BACKOFF;            
00133             F_Cs8900RegisterWrite2(PKTPG_LINE_CTL,i);
00134             // set frame receive interrupt enable                   
00135             F_Cs8900RegisterWrite2(PKTPG_RX_CFG,RX_CFG_RX_OK_I_E|RX_CFG_LOW_BITS);
00136             // set frame rx enable,
00137             // set destination address match enable
00138             // set broadcast address match enable
00139             F_Cs8900RegisterWrite2(PKTPG_RX_CTL,RX_CTL_RX_OK_A|RX_CTL_IND_ADDR_A|RX_CTL_BROADCAST_A|RX_CTL_LOW_BITS);
00140             // {0x00,0x80,0x48,0x12,0x34,0x56}
00141             pMac=(INT16U *)Cs8900Ctrl.MacAddress;
00142             #if(DEBUG_CS8900==1)
00143                 myprintf("\n pMAC %4x ",*pMac);
00144             #endif
00145             F_Cs8900RegisterWrite2(PKTPG_INDIVISUAL_ADDR+0,*pMac++); // 158,159
00146             #if(DEBUG_CS8900==1)
00147                 myprintf("\n pMAC %4x ",*pMac);
00148             #endif
00149             F_Cs8900RegisterWrite2(PKTPG_INDIVISUAL_ADDR+2,*pMac++); // 15a,15b
00150             #if(DEBUG_CS8900==1)
00151                 myprintf("\n pMAC %4x ",*pMac);
00152             #endif
00153             F_Cs8900RegisterWrite2(PKTPG_INDIVISUAL_ADDR+4,*pMac  ); // 15c,15d
00154             // disable interrupts for frame tx
00155             F_Cs8900RegisterWrite2(PKTPG_TX_CFG, TX_CFG_LOW_BITS);
00156             Cs8900Ctrl.State=Cs8900InitialState4;
00157             break;   
00158         case Cs8900InitialState4:
00159             // disable intrq 0,1,2,3 ...like interrupts(et0,et1,es0,ex0,ex1) in 8051
00160             F_Cs8900RegisterWrite2(PKTPG_INTERRUPT_NUMBER,INTERRUPT_NUMBER);
00161             // enable interrupt generation...like "ea" in 8051
00162             i=F_Cs8900RegisterRead2(PKTPG_BUS_CTL)|BUS_CTL_ENABLE_IRQ;
00163             F_Cs8900RegisterWrite2(PKTPG_BUS_CTL,i);
00164             // enable packet rx,tx
00165             i=F_Cs8900RegisterRead2(PKTPG_LINE_CTL)|LINE_CTL_RX_ON|LINE_CTL_TX_ON;
00166             F_Cs8900RegisterWrite2(PKTPG_LINE_CTL,i);
00167                 
00168             myprintf("\n CS8900 MAC initial ok");
00169             Cs8900Ctrl.InitialPass=TRUE;
00170             Cs8900Ctrl.State=Cs8900IdleState;
00171             break;        
00172     }
00173 }
00174 INT8U F_Cs8900InUseCheck(void){
00175     if(Cs8900Ctrl.InUse==TRUE) return TRUE;
00176     else return FALSE;
00177 }
00178 INT8U F_Cs8900Allocate(INT16U UserId){
00179     if(Cs8900Ctrl.InUse==FALSE){
00180         Cs8900Ctrl.InUse=TRUE;        
00181         Cs8900Ctrl.UserId=UserId;
00182         return TRUE;
00183     }
00184     else return FALSE;
00185 }
00186 INT8U F_Cs8900Release(INT16U UserId){
00187     if((Cs8900Ctrl.InUse==TRUE)&&(Cs8900Ctrl.UserId==UserId)){
00188         Cs8900Ctrl.InUse=FALSE;
00189         return TRUE;
00190     }
00191     else return FALSE;
00192 }
00193 INT8U F_Cs8900InitialStart(INT16U UserId){
00194     if((Cs8900Ctrl.InUse==TRUE)&&(Cs8900Ctrl.UserId==UserId)){
00195         Cs8900Ctrl.State=Cs8900InitialState0;   
00196         return TRUE;
00197     }
00198     else return FALSE;
00199 }
00200 INT8U F_Cs8900MacAddressSet(INT16U UserId,INT8U *pMacAddress){
00201     if((Cs8900Ctrl.InUse==TRUE)&&(Cs8900Ctrl.UserId==UserId)){
00202         Cs8900Ctrl.MacAddress[0]=pMacAddress[0];
00203         Cs8900Ctrl.MacAddress[1]=pMacAddress[1];
00204         Cs8900Ctrl.MacAddress[2]=pMacAddress[2];
00205         Cs8900Ctrl.MacAddress[3]=pMacAddress[3];
00206         Cs8900Ctrl.MacAddress[4]=pMacAddress[4];
00207         Cs8900Ctrl.MacAddress[5]=pMacAddress[5];
00208         return TRUE;
00209     }
00210     else return FALSE;
00211 }
00212 INT8U F_Cs8900IpAddressSet(INT16U UserId,INT8U *pIpAddress){
00213     if((Cs8900Ctrl.InUse==TRUE)&&(Cs8900Ctrl.UserId==UserId)){
00214         Cs8900Ctrl.IpAddress[0]=pIpAddress[0];
00215         Cs8900Ctrl.IpAddress[1]=pIpAddress[1];
00216         Cs8900Ctrl.IpAddress[2]=pIpAddress[2];
00217         Cs8900Ctrl.IpAddress[3]=pIpAddress[3];
00218         return TRUE;
00219     }
00220     else return FALSE;
00221 }
00222 INT8U F_Cs8900InitialPassCheck(void){
00223     if(Cs8900Ctrl.InitialPass==TRUE) return TRUE;
00224     else return FALSE;
00225 }
00226 INT8U F_Cs8900ReadyCheck(void){
00227     if(Cs8900Ctrl.State==Cs8900IdleState) return TRUE;
00228     else return FALSE;
00229 }
00230 INT16U F_Cs8900IoRegisterRead(INT16U Offset){   
00231     return F_Cs8900IoRead(Offset);
00232 }
00233 INT16U F_Cs8900RegisterRead(INT16U Offset){
00234     F_Cs8900IoWrite(IO_PACKET_PAGE_POINTER,Offset);
00235     return F_Cs8900IoRead(IO_PACKET_PAGE_DATA_0);
00236 }
00237 void F_Cs8900RegisterWrite(INT16U Offset,INT16U Data){
00238     F_Cs8900IoWrite(IO_PACKET_PAGE_POINTER,Offset);
00239     F_Cs8900IoWrite(IO_PACKET_PAGE_DATA_0,Data);
00240 }
00241 void F_Cs8900IrqEnable(void){ 
00242     INT16U i;
00243     
00244     // disable intrq 0,1,2,3 ...like interrupts(et0,et1,es0,ex0,ex1) in 8051
00245     F_Cs8900RegisterWrite2(PKTPG_INTERRUPT_NUMBER,INTERRUPT_NUMBER);
00246     // enable interrupt generation...like "ea" in 8051
00247      i=F_Cs8900RegisterRead2(PKTPG_BUS_CTL)|BUS_CTL_ENABLE_IRQ;
00248     F_Cs8900RegisterWrite2(PKTPG_BUS_CTL,i);
00249     // enable packet rx,tx
00250     i=F_Cs8900RegisterRead2(PKTPG_LINE_CTL)|LINE_CTL_RX_ON|LINE_CTL_TX_ON;
00251     F_Cs8900RegisterWrite2(PKTPG_LINE_CTL,i);
00252 }
00253 INT32U F_Cs8900PacketReceive(INT8U *pPacketData,INT32U PacketLength){
00254     INT32U  Length;
00255     INT32U  ReceiveLength=0;
00256     INT16U *pData;
00257     INT16U  Data;
00258     
00259     Data=F_Cs8900IoRead(IO_RX_TX_DATA_0);     // ignore first byte??
00260     Length=F_Cs8900IoRead(IO_RX_TX_DATA_0);   // read frame length
00261     if(Length>PacketLength) Length=0;         // frame length to large
00262     pData=(INT16U *)pPacketData;              // convert INT8U pointer to INT16U pointer
00263     ReceiveLength=Length; 
00264     while(ReceiveLength!=0){                   
00265         Data=F_Cs8900IoRead(IO_RX_TX_DATA_0); // host read frame data stored in cs8900 (in 16bits)
00266         if(ReceiveLength==1){
00267            *((INT8U*)pData)=(INT8U)Data;      // last byte if odd frame length      
00268            ReceiveLength=0;
00269         }
00270         else{
00271            *pData++=Data;                     // 16 bit
00272            ReceiveLength-=2;                  // 2*8bit 
00273         }        
00274     }
00275     return Length;
00276 }
00277 INT8U F_Cs8900PacketTransmit(INT8U *pPacketData,INT16U PacketLength){
00278     INT16U *pData;
00279     INT16U  BusStatus;
00280     INT32U  i;    
00281     
00282     // SPEC. 4.5.1 
00283     // set start transmission after entire frame is in cs8900
00284     F_Cs8900IoWrite(IO_TX_CMD,(TX_CMD_START_ALL|TX_CMD_LOW_BITS));
00285     // SPEC. 4.5.2
00286     // set tansmission packet length(in bytes)
00287     F_Cs8900IoWrite(IO_TX_LENGTH,PacketLength);
00288     for(i=0;i<MAX_COUNT;i++){                     // polling time counter
00289         BusStatus=F_Cs8900RegisterRead2(PKTPG_BUS_ST); // polling cs8900 ready
00290         if(BusStatus&BUS_ST_RDY_4_TX_NOW) break;       // polling status ready 
00291     } 
00292     if(i>=MAX_COUNT) return FALSE;                // polling time out, return
00293     pData=(INT16U *)pPacketData;                  // convert INT8U pointer to INT16U pointer
00294     while(PacketLength!=0){
00295         F_Cs8900IoWrite(IO_RX_TX_DATA_0, *pData++); // transmit data from host to cs8900(in 16bits)       
00296         if(PacketLength==1) PacketLength=0;       // last byte if odd frame length
00297         else PacketLength-=2;                      
00298     }
00299     return TRUE;
00300 }
00301 INT8U F_Cs8900PacketReceiveCheck(void){
00302     INT16U Event;
00303     
00304     // read INT_STATUS_QUEUE
00305     // then check if REG_NUM_RX_EVENT is in
00306     // then check if RX_EVENT_RX_OK   is ok
00307     // then check if RX_EVENT_IND_ADDR or RX_CTL_BROADCAST_A
00308     // then return TRUE <-- there is a packet received 
00309     Event=F_Cs8900IoRead(IO_INT_STATSU_QUEUE);
00310     if(((Event&ISQ_REG_NUM)==REG_NUM_RX_EVENT)&&     // check 000100
00311        ((Event&RX_EVENT_RX_OK)==RX_EVENT_RX_OK)&&   // has rx a frame 
00312        ((Event&RX_EVENT_IND_ADDR)|(Event&RX_CTL_BROADCAST_A))){
00313         Cs8900Ctrl.RxEvent=Event;
00314         //if(Event&RX_EVENT_IND_ADDR) Cs8900Ctrl.IsIndividual=TRUE;
00315         //else Cs8900Ctrl.IsIndividual=FALSE;
00316         //if(Event&RX_CTL_BROADCAST_A) Cs8900Ctrl.IsBroadcast=TRUE;
00317         //else Cs8900Ctrl.IsBroadcast=FALSE;
00318         return TRUE;
00319     }
00320     else return FALSE;    
00321 }
00322 INT8U F_Cs8900Link(void){
00323     return TRUE;
00324 }