00001 ;
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011 %define PIC_MASTER_PORT 0x20 ;master 8259
00012 %define PIC_MASTER_PORT2 0x21 ;master 8259
00013 %define PIC_SLAVE_PORT 0xa0 ;slave 8259
00014 %define PIC_SLAVE_PORT2 0xa1 ;slave 8259
00015 %define PIC_EOI 0x20 ;end of interrupt
00016
00017 global _PicIrqDisable
00018 global _PicIrqEnable
00019
00020 [section .text] ;code section
00021 ;
00022
00023
00024
00025 _PicIrqDisable:
00026 mov ecx,[esp+4] ;get paramter passed
00027 pushfd
00028 cli ;disable all maskable interrupt
00029 mov ah,1 ;ah=1
00030 rol ah,cl ;
00031 cmp cl,8
00032 jae L_DisableHighIrq ;if >=8,jump to disable high irq
00033 L_DisableLowIrq:
00034 in al,PIC_MASTER_PORT2 ;get current master pic setting
00035 or al,ah ;set ith bit in pic master
00036 out PIC_MASTER_PORT2,al ;write to 8259
00037 popfd ;pop register back
00038 ret ;return
00039 L_DisableHighIrq:
00040 in al,PIC_SLAVE_PORT2 ;get current master pic setting
00041 or al,ah ;set ith bit in pic master
00042 out PIC_SLAVE_PORT2,al ;write to 8259
00043 popfd ;pop register back
00044 ret ;return
00045 ;
00046
00047
00048
00049 _PicIrqEnable:
00050 mov ecx,[esp+4] ;get irq number
00051 pushfd ;push eflags of cpu
00052 cli ;disable external interrupt
00053 mov ah,~1 ;ah=11111110b
00054 rol ah,cl ;shift 0's bit to corrospand
00055 cmp cl,8 ;compare cl with 8
00056 jae L_EnableHighIrq ;if cl >= 8,jump EnableHighIrq
00057 L_EnableLowIrq:
00058 in al,PIC_MASTER_PORT2 ;unmask int bit in master 8259
00059 and al,ah ;unmask int bit in master 8259
00060 out PIC_MASTER_PORT2,al ;unmask int bit in master 8259
00061 popfd ;pop eflags of cpu
00062 ret
00063 L_EnableHighIrq:
00064 in al,PIC_SLAVE_PORT2 ;unmask int bit in slave 8259
00065 and al,ah ;unmask int bit in slave 8259
00066 out PIC_SLAVE_PORT2,al ;unmask int bit in slave 8259
00067 popfd ;pop eflags of cpu
00068 ret