fdc1.h File Reference

Go to the source code of this file.

Data Structures

struct  FDC_RECORD
struct  FLOPPY_FORMAT
struct  FDC_CONTROL

Defines

#define FDC_DMA_EANBLE   1
#define FDC_DMA_CHANNEL   2
#define FDC_IRQ   6
#define FDC_NO_ERROR   0
#define FDC_ERROR   1
#define FDC_NODISK   2
#define FDC_TIMEROUT   3
#define FDC_WRITE   0
#define FDC_READ   1
#define FDC1_BASE   0x3f0
#define FDC1_STATUS_A   0x3f0
#define FDC1_STATUS_B   0x3f1
#define FDC1_DOR_REG   0x3f2
#define FDC1_MSR_REG   0x3f4
#define FDC1_DSR_REG   0x3f4
#define FDC1_FIFO_REG   0x3f5
#define FDC1_DIR_REG   0x3f7
#define FDC1_CCR_REG   0x3f7
#define FDC_MSR_FDD0_BUSY   0x01
#define FDC_MSR_FDD1_BUSY   0x02
#define FDC_MSR_FDD2_BUSY   0x04
#define FDC_MSR_FDD3_BUSY   0x08
#define FDC_MSR_FDC_BUSY   0x10
#define FDC_MSR_NON_DMA   0x20
#define FDC_MSR_DIO   0x40
#define FDC_MSR_RQM   0x80
#define FDC_DOR_DEVICENUM0   0x00
#define FDC_DOR_DEVICENUM1   0x01
#define FDC_DOR_DEVICENUM2   0x10
#define FDC_DOR_DEVICENUM3   0x11
#define FDC_DOR_RESETB   0x04
#define FDC_DOR_DMAGATE   0x08
#define FDC_DOR_MOTORON_FDD0   0x10
#define FDC_DOR_MOTORON_FDD1   0x20
#define FDC_DOR_MOTORON_FDD2   0x40
#define FDC_DOR_MOTORON_FDD3   0x80
#define FDC_DIR_DISKCHANGE   0x80
#define CCR_DTR_MASK   0x03
#define CCR_DTR_500K   0x00
#define CCR_DTR_300K   0x01
#define CCR_DTR_250K   0x10
#define CCR_DTR_1M   0x11
#define FDC_CMD_READDATA   0x06
#define FDC_CMD_READDELETEDATA   0x0c
#define FDC_CMD_READTRACK   0x02
#define FDC_CMD_WRITEDATA   0x05
#define FDC_CMD_WRITEDELETEDATA   0x09
#define FDC_CMD_VERIFY   0x16
#define FDC_CMD_FORMATTRACK   0x0d
#define FDC_CMD_SCANEQUAL   0x11
#define FDC_CMD_SCANLOWEQUAL   0x19
#define FDC_CMD_SCANHIGHEQUAL   0x1d
#define FDC_CMD_READID   0x0a
#define FDC_CMD_RECALIBRATE   0x07
#define FDC_CMD_SEEK   0x0f
#define FDC_CMD_SENSEINTERRUPTSTATUS   0x08
#define FDC_CMD_SENSEDRIVESTATUS   0x04
#define FDC_CMD_SPECIFY   0x03
#define FDC_CMD_CONFIGURE   0x13
#define FDC_CMD_VERSION   0x10
#define FDC_CMD_RELATIVESEEK   0x8f
#define FDC_CMD_DUMPREG   0x0e
#define FDC_CMD_PERPENDICULARMODE   0x12
#define FDC_CMD_LOCK   0x14
#define FDC_MT   0x80
#define FDC_MFM   0x40
#define FDC_SK   0x20
#define FDC_COMMAND_ATTRIBUTE   (FDC_MT|FDC_MFM|FDC_SK)
#define FDC_HEAD_PER_DISK   2
#define FDC_TRACK_PER_HEAD   80
#define FDC_SECTOR_PER_TRACK   18
#define FDC_TOTAL_SECTOR   (FDC_HEAD_PER_DISK*FDC_TRACK_PER_HEAD*FDC_SECTOR_PER_TRACK)
#define FDC_GAP3   0x1b
#define FDC_RATE   CCR_DTR_500K
#define FDC_HEAD_UNLOAD_TIME   0xcf
#define FDC_GAP3_FORMATING   0x6c
#define FDC_DMA_READ   0x44
#define FDC_DMA_WRITE   0x48
#define FDC_DEVICE_NONE   0
#define FDC_DEVICE_NEC765   1
#define FDC_DEVICE_ENHENCED   2
#define FDC_DISK_CHANGE   0x01
#define FDC_SPIN_UP   0x02
#define FDC_SPIN_DOWN   0x04
#define FDC_HLT   0x08
#define FDC_HUT   0x0f
#define FDC_SRT   0x0c
#define FDC_ND   0
#define FDC_GAP3   0x1B
#define FDC_IC_NORMAL   0x00
#define FDC_IC_ABNORMAL   0x40
#define FDC_IC_INVALID   0x80
#define FDC_IC_ABNORMAL_POLLING   0xc0
#define FDC_SECTORSIZE_128   0x00
#define FDC_SECTORSIZE_256   0x01
#define FDC_SECTORSIZE_512   0x02
#define FDC_SECTORSIZE_1k   0x03
#define FDC_SECTORSIZE_2k   0x04
#define FDC_SECTORSIZE_4k   0x05
#define FDC_SECTORSIZE_8k   0x06
#define FDC_SECTORSIZE_16k   0x07
#define FDC_DRIVE0   0x00
#define FDC_DRIVE1   0x01
#define FDC_DRIVE2   0x02
#define FDC_DRIVE3   0x03
#define FDC_IN_NONDATA   0
#define FDC_IN_READ   1
#define FDC_IN_WRITE   2

Functions

void Fdc1Init (void)
void Fdc1Handler (void)
bool Fdc1Test (void)
void Fdc1Initialization (void)
bool Fdc1Recalibrate (void)
bool Fdc1SenseInterruptStatus (void)
void Fdc1Version (void)
bool Fdc1Specify (void)
void Fdc1ReadId (void)
bool Fdc1Seek (U8 TrackNumber)
void Fdc1Delay (U16 Time)
bool Fdc1RecalibrateProcedure (void)
bool Fdc1SeekProcedure (U8)
void Fdc1ReadTest (void)
U8 Fdc1ReadMsr (void)

Variables

FDC_CONTROL Fdc1Ctrl


Define Documentation

#define CCR_DTR_1M   0x11

Definition at line 84 of file fdc1.h.

#define CCR_DTR_250K   0x10

Definition at line 83 of file fdc1.h.

#define CCR_DTR_300K   0x01

Definition at line 82 of file fdc1.h.

#define CCR_DTR_500K   0x00

Definition at line 81 of file fdc1.h.

#define CCR_DTR_MASK   0x03

Definition at line 80 of file fdc1.h.

#define FDC1_BASE   0x3f0

Definition at line 47 of file fdc1.h.

#define FDC1_CCR_REG   0x3f7

Definition at line 55 of file fdc1.h.

#define FDC1_DIR_REG   0x3f7

Definition at line 54 of file fdc1.h.

#define FDC1_DOR_REG   0x3f2

Definition at line 50 of file fdc1.h.

#define FDC1_DSR_REG   0x3f4

Definition at line 52 of file fdc1.h.

#define FDC1_FIFO_REG   0x3f5

Definition at line 53 of file fdc1.h.

#define FDC1_MSR_REG   0x3f4

Definition at line 51 of file fdc1.h.

#define FDC1_STATUS_A   0x3f0

Definition at line 48 of file fdc1.h.

#define FDC1_STATUS_B   0x3f1

Definition at line 49 of file fdc1.h.

#define FDC_CMD_CONFIGURE   0x13

Definition at line 106 of file fdc1.h.

#define FDC_CMD_DUMPREG   0x0e

Definition at line 109 of file fdc1.h.

#define FDC_CMD_FORMATTRACK   0x0d

Definition at line 94 of file fdc1.h.

#define FDC_CMD_LOCK   0x14

Definition at line 112 of file fdc1.h.

#define FDC_CMD_PERPENDICULARMODE   0x12

Definition at line 111 of file fdc1.h.

#define FDC_CMD_READDATA   0x06

Definition at line 88 of file fdc1.h.

#define FDC_CMD_READDELETEDATA   0x0c

Definition at line 89 of file fdc1.h.

#define FDC_CMD_READID   0x0a

Definition at line 100 of file fdc1.h.

#define FDC_CMD_READTRACK   0x02

Definition at line 90 of file fdc1.h.

#define FDC_CMD_RECALIBRATE   0x07

Definition at line 101 of file fdc1.h.

#define FDC_CMD_RELATIVESEEK   0x8f

Definition at line 108 of file fdc1.h.

#define FDC_CMD_SCANEQUAL   0x11

Definition at line 96 of file fdc1.h.

#define FDC_CMD_SCANHIGHEQUAL   0x1d

Definition at line 98 of file fdc1.h.

#define FDC_CMD_SCANLOWEQUAL   0x19

Definition at line 97 of file fdc1.h.

#define FDC_CMD_SEEK   0x0f

Definition at line 102 of file fdc1.h.

#define FDC_CMD_SENSEDRIVESTATUS   0x04

Definition at line 104 of file fdc1.h.

#define FDC_CMD_SENSEINTERRUPTSTATUS   0x08

Definition at line 103 of file fdc1.h.

#define FDC_CMD_SPECIFY   0x03

Definition at line 105 of file fdc1.h.

#define FDC_CMD_VERIFY   0x16

Definition at line 93 of file fdc1.h.

#define FDC_CMD_VERSION   0x10

Definition at line 107 of file fdc1.h.

#define FDC_CMD_WRITEDATA   0x05

Definition at line 91 of file fdc1.h.

#define FDC_CMD_WRITEDELETEDATA   0x09

Definition at line 92 of file fdc1.h.

#define FDC_COMMAND_ATTRIBUTE   (FDC_MT|FDC_MFM|FDC_SK)

Definition at line 117 of file fdc1.h.

#define FDC_DEVICE_ENHENCED   2

Definition at line 133 of file fdc1.h.

#define FDC_DEVICE_NEC765   1

Definition at line 132 of file fdc1.h.

#define FDC_DEVICE_NONE   0

Definition at line 131 of file fdc1.h.

#define FDC_DIR_DISKCHANGE   0x80

Definition at line 78 of file fdc1.h.

#define FDC_DISK_CHANGE   0x01

Definition at line 135 of file fdc1.h.

#define FDC_DMA_CHANNEL   2

Definition at line 35 of file fdc1.h.

#define FDC_DMA_EANBLE   1

Definition at line 34 of file fdc1.h.

#define FDC_DMA_READ   0x44

Definition at line 128 of file fdc1.h.

#define FDC_DMA_WRITE   0x48

Definition at line 129 of file fdc1.h.

#define FDC_DOR_DEVICENUM0   0x00

Definition at line 66 of file fdc1.h.

#define FDC_DOR_DEVICENUM1   0x01

Definition at line 67 of file fdc1.h.

#define FDC_DOR_DEVICENUM2   0x10

Definition at line 68 of file fdc1.h.

#define FDC_DOR_DEVICENUM3   0x11

Definition at line 69 of file fdc1.h.

#define FDC_DOR_DMAGATE   0x08

Definition at line 71 of file fdc1.h.

#define FDC_DOR_MOTORON_FDD0   0x10

Definition at line 72 of file fdc1.h.

#define FDC_DOR_MOTORON_FDD1   0x20

Definition at line 73 of file fdc1.h.

#define FDC_DOR_MOTORON_FDD2   0x40

Definition at line 74 of file fdc1.h.

#define FDC_DOR_MOTORON_FDD3   0x80

Definition at line 75 of file fdc1.h.

#define FDC_DOR_RESETB   0x04

Definition at line 70 of file fdc1.h.

#define FDC_DRIVE0   0x00

Definition at line 166 of file fdc1.h.

#define FDC_DRIVE1   0x01

Definition at line 167 of file fdc1.h.

#define FDC_DRIVE2   0x02

Definition at line 168 of file fdc1.h.

#define FDC_DRIVE3   0x03

Definition at line 169 of file fdc1.h.

#define FDC_ERROR   1

Definition at line 39 of file fdc1.h.

#define FDC_GAP3   0x1B

Definition at line 148 of file fdc1.h.

#define FDC_GAP3   0x1b

Definition at line 148 of file fdc1.h.

#define FDC_GAP3_FORMATING   0x6c

Definition at line 126 of file fdc1.h.

#define FDC_HEAD_PER_DISK   2

Definition at line 119 of file fdc1.h.

#define FDC_HEAD_UNLOAD_TIME   0xcf

Definition at line 125 of file fdc1.h.

#define FDC_HLT   0x08

Definition at line 139 of file fdc1.h.

#define FDC_HUT   0x0f

Definition at line 140 of file fdc1.h.

#define FDC_IC_ABNORMAL   0x40

Definition at line 153 of file fdc1.h.

#define FDC_IC_ABNORMAL_POLLING   0xc0

Definition at line 155 of file fdc1.h.

#define FDC_IC_INVALID   0x80

Definition at line 154 of file fdc1.h.

#define FDC_IC_NORMAL   0x00

Definition at line 152 of file fdc1.h.

#define FDC_IN_NONDATA   0

Definition at line 171 of file fdc1.h.

#define FDC_IN_READ   1

Definition at line 172 of file fdc1.h.

#define FDC_IN_WRITE   2

Definition at line 173 of file fdc1.h.

#define FDC_IRQ   6

Definition at line 36 of file fdc1.h.

#define FDC_MFM   0x40

Definition at line 115 of file fdc1.h.

#define FDC_MSR_DIO   0x40

Definition at line 63 of file fdc1.h.

#define FDC_MSR_FDC_BUSY   0x10

Definition at line 61 of file fdc1.h.

#define FDC_MSR_FDD0_BUSY   0x01

Definition at line 57 of file fdc1.h.

#define FDC_MSR_FDD1_BUSY   0x02

Definition at line 58 of file fdc1.h.

#define FDC_MSR_FDD2_BUSY   0x04

Definition at line 59 of file fdc1.h.

#define FDC_MSR_FDD3_BUSY   0x08

Definition at line 60 of file fdc1.h.

#define FDC_MSR_NON_DMA   0x20

Definition at line 62 of file fdc1.h.

#define FDC_MSR_RQM   0x80

Definition at line 64 of file fdc1.h.

#define FDC_MT   0x80

Definition at line 114 of file fdc1.h.

#define FDC_ND   0

Definition at line 145 of file fdc1.h.

#define FDC_NO_ERROR   0

Definition at line 38 of file fdc1.h.

#define FDC_NODISK   2

Definition at line 40 of file fdc1.h.

#define FDC_RATE   CCR_DTR_500K

Definition at line 124 of file fdc1.h.

#define FDC_READ   1

Definition at line 44 of file fdc1.h.

#define FDC_SECTOR_PER_TRACK   18

Definition at line 121 of file fdc1.h.

#define FDC_SECTORSIZE_128   0x00

Definition at line 157 of file fdc1.h.

#define FDC_SECTORSIZE_16k   0x07

Definition at line 164 of file fdc1.h.

#define FDC_SECTORSIZE_1k   0x03

Definition at line 160 of file fdc1.h.

#define FDC_SECTORSIZE_256   0x01

Definition at line 158 of file fdc1.h.

#define FDC_SECTORSIZE_2k   0x04

Definition at line 161 of file fdc1.h.

#define FDC_SECTORSIZE_4k   0x05

Definition at line 162 of file fdc1.h.

#define FDC_SECTORSIZE_512   0x02

Definition at line 159 of file fdc1.h.

#define FDC_SECTORSIZE_8k   0x06

Definition at line 163 of file fdc1.h.

#define FDC_SK   0x20

Definition at line 116 of file fdc1.h.

#define FDC_SPIN_DOWN   0x04

Definition at line 137 of file fdc1.h.

#define FDC_SPIN_UP   0x02

Definition at line 136 of file fdc1.h.

#define FDC_SRT   0x0c

Definition at line 141 of file fdc1.h.

#define FDC_TIMEROUT   3

Definition at line 41 of file fdc1.h.

#define FDC_TOTAL_SECTOR   (FDC_HEAD_PER_DISK*FDC_TRACK_PER_HEAD*FDC_SECTOR_PER_TRACK)

Definition at line 122 of file fdc1.h.

#define FDC_TRACK_PER_HEAD   80

Definition at line 120 of file fdc1.h.

#define FDC_WRITE   0

Definition at line 43 of file fdc1.h.


Function Documentation

void Fdc1Delay ( U16  Time  ) 

void Fdc1Handler ( void   ) 

Definition at line 53 of file fdc1.c.

00053                       {
00054     Fdc1Ctrl.HasInterrupt=true;
00055 }

void Fdc1Init ( void   ) 

void Fdc1Initialization ( void   ) 

Definition at line 164 of file fdc1.c.

00164                              {
00165     U8 i,i2;
00166     U32 j;
00167     
00168     //reset
00169     Fdc1WriteDor(0x00);            //stop all motors,disable dma,reset 82077aa core
00170     for(j=0;j<10000;j++);          //a small delay for older controller
00171     Fdc1WriteDor(0x0c);            //stop all motors,enable dma,release reset,select drive a
00172     for(j=0;j<10000;j++);          //a small delay for older controller
00173     //OutByte(FDC1_DSR_REG,0x00);  //set data rate 500kbits/sec
00174     //for(j=0;j<10000;j++);        //a small delay for older controller
00175     OutByte(FDC1_CCR_REG,0x00);    //configuration control register..set data rate 500kbits/sec
00176     for(j=0;j<10000;j++);          //a small delay for older controller
00177     for(j=0;j<4;j++) Fdc1SenseInterruptStatus(); //clear status flag for each drive
00178     Fdc1Version();                 //check floppy version
00179     Fdc1Specify();                 //setup srt,hut,hlt,nd
00180     OutByte(RTC_ADDRESS_PORT,0x10);            //read CMOS s.t. we can see what fdd we have 
00181     i=InByte(0x71);
00182     i2=i;
00183     i=i>>4;
00184     i2=i2&0x0f;
00185     if((i>=0)&&(i<=6)){
00186         Fdc1Ctrl.Device0Type=i;
00187         #if(DEBUG_FDC_INFO==1)
00188             GuiStringPrint("\nFloppy primary: ");
00189             GuiStringPrint(FdcTypes[i].name);
00190         #endif
00191     }
00192     if((i2>=0)&&(i2<=6)){
00193         Fdc1Ctrl.Device1Type=i2;
00194         #if(DEBUG_FDC_INFO==1)
00195             GuiStringPrint("\nFloppy secondary: ");
00196             GuiStringPrint(FdcTypes[i2].name);
00197         #endif
00198     }
00199     return true; //after this return,82077aa is ready to accept commands
00200 }

void Fdc1ReadId ( void   ) 

Definition at line 346 of file fdc1.c.

00346                      {
00347     U8 i;
00348     
00349     Fdc1Ctrl.State==FDC_IN_NONDATA;
00350     Fdc1WriteFifo(FDC_CMD_READID);
00351     //Fdc1WriteFifo(FDC_CMD_READID|FDC_MFM);
00352     Fdc1WriteFifo(0x00); //bit2=head selected,bit1.0=drive number
00353     Fdc1Ctrl.Timer=1000;
00354     while(Fdc1Ctrl.Timer!=0){
00355         if(Fdc1Ctrl.HasInterrupt==true) break;
00356     }
00357     if(Fdc1Ctrl.HasInterrupt==true){ 
00358         #if(DEBUG_FDC_INTERRUPT==1)
00359             GuiStringPrint("\nsee interrupt");
00360         #endif
00361         Fdc1Ctrl.HasInterrupt=false;
00362     }
00363     if(Fdc1Ctrl.Timer==0){
00364          #if(DEBUG_FDC_TIMEOUT==1)
00365              GuiStringPrint("\nreadid time out");
00366          #endif
00367          return false;
00368     }
00369     BufferIndex=0;
00370     Fdc1ReadMsr();
00371     BufferIndex=0;
00372     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //status register 0
00373     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //status register 0
00374     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //status register 0
00375     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //cylinder
00376     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //head
00377     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //sector address
00378     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo(); //sector size
00379     #if(DEBUG_FDC_INFO==1)
00380         GuiStringPrint("\nST0: ");
00381         GuiU8Print(Fdc1ResultBuffer[0]);
00382         GuiStringPrint("\nST1: ");
00383         GuiU8Print(Fdc1ResultBuffer[1]);
00384         GuiStringPrint("\nST2: ");
00385         GuiU8Print(Fdc1ResultBuffer[2]);
00386         GuiStringPrint("\n C : ");
00387         GuiU8Print(Fdc1ResultBuffer[3]);
00388         GuiStringPrint("\n H : ");
00389         GuiU8Print(Fdc1ResultBuffer[4]);
00390         GuiStringPrint("\n R : ");
00391         GuiU8Print(Fdc1ResultBuffer[5]);
00392         GuiStringPrint("\n N : ");
00393         GuiU8Print(Fdc1ResultBuffer[6]);
00394     #endif
00395 }

U8 Fdc1ReadMsr ( void   ) 

Definition at line 133 of file fdc1.c.

00133                     {
00134     Fdc1Ctrl.MsrReg=InByte(FDC1_MSR_REG);
00135     #if(DEBUG_FDC_MSR==1)
00136         GuiStringPrint("MSR:");
00137         GuiU8Print(Fdc1Ctrl.MsrReg);
00138         GuiStringPrint(" ");
00139         /*if(Fdc1Ctrl.MsrReg&FDC_MSR_RQM) GuiStringPrint(" RQM=1,");
00140         else GuiStringPrint(" RQM=0,");
00141         if(Fdc1Ctrl.MsrReg&FDC_MSR_DIO) GuiStringPrint(" DIO=1,");
00142         else GuiStringPrint(" DIO=0,");
00143         if(Fdc1Ctrl.MsrReg&FDC_MSR_NON_DMA) GuiStringPrint(" NONDMA=1,");
00144         else GuiStringPrint(" NONDMA=0,");
00145         if(Fdc1Ctrl.MsrReg&FDC_MSR_FDC_BUSY) GuiStringPrint(" BUSY=1,");
00146         else GuiStringPrint(" BUSY=0,");*/
00147     #endif
00148     return Fdc1Ctrl.MsrReg;
00149 }

void Fdc1ReadTest ( void   ) 

bool Fdc1Recalibrate ( void   ) 

Definition at line 223 of file fdc1.c.

00223                           {
00224     U8 i;
00225     
00226     Fdc1Ctrl.State==FDC_IN_NONDATA;
00227     Fdc1WriteFifo(FDC_CMD_RECALIBRATE);
00228     Fdc1WriteFifo(FDC_DRIVE0);
00229     Fdc1Ctrl.Timer=1000;
00230     while(Fdc1Ctrl.Timer!=0){
00231         if(Fdc1Ctrl.HasInterrupt==true) break;
00232     }
00233     if(Fdc1Ctrl.HasInterrupt==true){ 
00234         #if(DEBUG_FDC_INTERRUPT==1)
00235             GuiStringPrint("\nsee interrupt");
00236         #endif
00237         Fdc1Ctrl.HasInterrupt=false;
00238     }
00239     if(Fdc1Ctrl.Timer==0){
00240          #if(DEBUG_FDC_TIMEOUT==1)
00241              GuiStringPrint("\ncalibrate time out");
00242          #endif
00243          return false;
00244     }
00245     BufferIndex=0;
00246     Fdc1ReadMsr();
00247     return true;
00248 }

bool Fdc1RecalibrateProcedure ( void   ) 

Definition at line 425 of file fdc1.c.

00425                                    {
00426     if((Fdc1Ctrl.DorReg&(FDC_DOR_MOTORON_FDD0|0x0c))!=(FDC_DOR_MOTORON_FDD0|0x0c)){
00427         Fdc1WriteDor(FDC_DOR_MOTORON_FDD0|0x0c);      //enable motor 0,/dmagate=1,/reset=1,select drive a
00428         Fdc1TimeDelay(20);                         //wait 20 ms
00429     }
00430     Fdc1Recalibrate();
00431     if(Fdc1SenseInterruptStatus()==true) return true;
00432     else return false;
00433 }

bool Fdc1Seek ( U8  TrackNumber  ) 

Definition at line 397 of file fdc1.c.

00397                              {
00398     U8 i;
00399     
00400     
00401     Fdc1Ctrl.State==FDC_IN_NONDATA;
00402     Fdc1WriteFifo(FDC_CMD_SEEK);
00403     Fdc1WriteFifo(0x00);          // hds=0,ds1:ds0=00
00404     Fdc1WriteFifo(TrackNumber);          // new cylinder number
00405     //Fdc1WriteFifo(0x00);          // new cylinder number
00406     Fdc1Ctrl.Timer=1000;
00407     while(Fdc1Ctrl.Timer!=0){
00408         if(Fdc1Ctrl.HasInterrupt==true) break;
00409     }
00410     if(Fdc1Ctrl.HasInterrupt==true){
00411         #if(DEBUG_FDC_INTERRUPT==1)
00412             GuiStringPrint("\nsee interrupt");
00413         #endif
00414         Fdc1Ctrl.HasInterrupt=false;
00415     }
00416     if(Fdc1Ctrl.Timer==0){
00417          #if(DEBUG_FDC_TIMEOUT==1)
00418              GuiStringPrint("\nseek time out");
00419          #endif
00420          return false;
00421     }
00422     return true;
00423 }

bool Fdc1SeekProcedure ( U8   ) 

Definition at line 435 of file fdc1.c.

00435                                       {
00436     if((Fdc1Ctrl.DorReg&(FDC_DOR_MOTORON_FDD0|0x0c))!=(FDC_DOR_MOTORON_FDD0|0x0c)){
00437         Fdc1WriteDor(FDC_DOR_MOTORON_FDD0|0x0c);      //enable motor 0,/dmagate=1,/reset=1,select drive a
00438         Fdc1TimeDelay(20);                         //wait 20 ms
00439     }
00440     Fdc1Seek(TrackNumber);
00441     if(Fdc1SenseInterruptStatus()==true) return true;
00442     else return false;
00443 }

bool Fdc1SenseInterruptStatus ( void   ) 

Definition at line 256 of file fdc1.c.

00256                                    {
00257     U8 i,i2;
00258     
00259     Fdc1Ctrl.State==FDC_IN_NONDATA;
00260     BufferIndex=0;
00261     Fdc1WriteFifo(FDC_CMD_SENSEINTERRUPTSTATUS); //check interrupt status
00262     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo();
00263     Fdc1ResultBuffer[BufferIndex++]=Fdc1ReadFifo();
00264     Fdc1ReadMsr();
00265     #if(DEBUG_FDC_INFO==1)
00266         //GuiStringPrint("\nsense interrupt status command");
00267         //GuiStringPrint("\nst0: ");
00268         //GuiU8Print(Fdc1ResultBuffer[0]);
00269         //GuiStringPrint(" pcn: ");
00270         //GuiU8Print(Fdc1ResultBuffer[1]);
00271     #endif
00272     if((Fdc1ResultBuffer[0]&0xc0)==FDC_IC_NORMAL){
00273         #if(DEBUG_FDC_ST0==1)
00274             GuiStringPrint("\nnormal termination.");
00275         #endif
00276         return true;
00277     }
00278     else{
00279         #if(DEBUG_FDC_ST0==1)
00280             if((Fdc1ResultBuffer[0]&0xc0)==FDC_IC_ABNORMAL) GuiStringPrint("\nabnormal termination");
00281             else if((Fdc1ResultBuffer[0]&0xc0)==FDC_IC_INVALID) GuiStringPrint("\ninvalid termination");
00282             else if((Fdc1ResultBuffer[0]&0xc0)==FDC_IC_ABNORMAL_POLLING) GuiStringPrint("\nabnormal termination by polling");
00283         #endif
00284         //return false;
00285         return true;
00286     }
00287 }

bool Fdc1Specify ( void   ) 

Definition at line 337 of file fdc1.c.

00337                       {
00338     Fdc1Ctrl.State==FDC_IN_NONDATA;
00339     Fdc1WriteFifo(FDC_CMD_SPECIFY);
00340     Fdc1WriteFifo((FDC_SRT*0x10)|FDC_HUT);
00341     Fdc1WriteFifo(FDC_HLT|FDC_ND);
00342     if(Fdc1ReadMsr()&FDC_MSR_FDC_BUSY) return false;
00343     else return true;
00344 }

bool Fdc1Test ( void   ) 

void Fdc1Version ( void   ) 

Definition at line 293 of file fdc1.c.

00293                       {
00294     Fdc1Ctrl.State==FDC_IN_NONDATA;
00295     Fdc1WriteFifo(FDC_CMD_VERSION);
00296     Fdc1ResultBuffer[0]=Fdc1ReadFifo();
00297     #if(DEBUG_FDC_INFO==1)
00298         GuiStringPrint("\ndetermine controller version: ");
00299         GuiU8Print(Fdc1ResultBuffer[0]);
00300     #endif
00301     switch(Fdc1ResultBuffer[0]){
00302         case 0x80:
00303             Fdc1Ctrl.ControllerType=FDC_DEVICE_NEC765;
00304             #if(DEBUG_FDC_INFO==1)
00305                 GuiStringPrint("\n8272A/765A FDC is found on 0x3f0");
00306             #endif
00307             break;
00308         case 0x90:
00309             Fdc1Ctrl.ControllerType=FDC_DEVICE_ENHENCED;
00310             #if(DEBUG_FDC_INFO==1)
00311                 GuiStringPrint("\n82077AA FDC is found on 0x3f0");
00312             #endif
00313             break;
00314         default:
00315             Fdc1Ctrl.ControllerType=FDC_DEVICE_NONE;
00316             #if(DEBUG_FDC_INFO==1)
00317                 GuiStringPrint("\nUNKNOW FDC ");
00318             #endif
00319             break;
00320     }
00321     #if(DEBUG_FDC_INFO==1)
00322         GuiStringPrint("\n");
00323     #endif
00324 }


Variable Documentation

Definition at line 35 of file fdc1.c.


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